Various coding style and cosmetic fixes (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@509 f3766cd6-281f-0410-b1cd-43a5c92072e9
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2 changed files with 73 additions and 59 deletions
118
device/pnp_raw.c
118
device/pnp_raw.c
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@ -24,78 +24,92 @@
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#include <device/pnp.h>
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#include <io.h>
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/* very low level pnp manipulation intended for stage 0 or 1 */
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/* Very low-level PNP functions, mostly intended for stage 0 or 1 */
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/**
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* rawpnp_enter_ext_funct -- Enter the PNP extended functions,
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* i.e. configuration mode
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* @param dev The device IO port.
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*/
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void rawpnp_enter_ext_func_mode(u16 dev)
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* Enter the PNP extended function mode (a.k.a. "MB PnP" or "config" mode).
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*
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* @param port The device I/O port.
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*/
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void rawpnp_enter_ext_func_mode(u16 port)
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{
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outb(0x87, dev);
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outb(0x87, dev);
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outb(0x87, port);
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outb(0x87, port);
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}
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/**
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* Exit the PNP extended functions, i.e. configuration mode
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* @param dev The device IO port.
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*/
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void rawpnp_exit_ext_func_mode(u16 dev)
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* Exit the PNP extended function mode (a.k.a. "MB PnP" or "config" mode).
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*
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* @param dev The device IO port.
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*/
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void rawpnp_exit_ext_func_mode(u16 port)
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{
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outb(0xaa, dev);
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outb(0xaa, port);
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}
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/**
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* Write a pnp configuration register. This is done by writing
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* the register number to the port, and the value to the
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* port+1
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* @param dev The device IO port.
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* @param reg The register number
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* @param value The new value.
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*/
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void rawpnp_write_config(u16 dev, u8 reg, u8 value)
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* Write an 8 bit value into a PNP configuration register.
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*
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* This is done by writing the register number to the port, and the value
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* into port + 1. This code assumes that the data port is always the
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* config-port plus 1, but luckily this is true for pretty much all devices.
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*
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* @param port The device I/O port.
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* @param reg The register number.
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* @param value The value to write into the specified register.
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*/
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void rawpnp_write_config(u16 port, u8 reg, u8 value)
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{
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outb(reg, dev);
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outb(value,dev + 1);
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outb(reg, port);
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outb(value, port + 1);
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}
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/**
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* Select a logical device. PNP has up to 16 logical devices.
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* They are selected by writing the device # to register 7.
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* @param dev The device IO port.
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* @param which Which device
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*/
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void rawpnp_set_logical_device(u16 dev, u8 which)
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* Select a logical device.
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*
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* PNP has up to 16 logical devices. They are selected by writing the
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* logical device number (LDN) to register 0x07.
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*
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* @param dev The device I/O port.
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* @param ldn The logical device (number) which should be selected.
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*/
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void rawpnp_set_logical_device(u16 port, u8 ldn)
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{
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rawpnp_write_config(dev, 0x07, which);
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rawpnp_write_config(port, 0x07, ldn);
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}
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/**
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* Set the enable for the device. The enable is at register 30.
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* Setting the low bit enables the device.
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* Code must have selected the proper device using
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* rawpnp_set_logical_device. If enable is non-zero, device
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* is enabled. If enable is zero, device is disabled.
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* @param dev The device IO port.
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* @param enable non-zero enables the device
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*/
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void rawpnp_set_enable(u16 dev, int enable)
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* Set the enable for the logical device.
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*
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* The enable is at register 0x30. Setting bit zero enables the device.
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* Code must have selected the proper logical device number (LDN) using
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* rawpnp_set_logical_device() beforehand. If enable is non-zero, the device
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* is enabled. If enable is zero, the device is disabled.
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*
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* @param port The device I/O port.
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* @param enable Non-zero enables the device, zero disables it.
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*/
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void rawpnp_set_enable(u16 port, int enable)
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{
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rawpnp_write_config(dev, 0x30, enable ? 0x1 : 0x0);
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rawpnp_write_config(port, 0x30, enable ? 0x1 : 0x0);
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}
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/**
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* Set the iobase for the device. The iobase is at registers 'index'
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* and 'index + 1', since these are 8 bit registers and iobase is 16 bits.
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* Code must have selected the proper device using
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* rawpnp_set_logical_device.
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* @param dev The device IO port.
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* @param iobase The 16 bit iobase
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*/
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void rawpnp_set_iobase(u16 dev, u8 index, u16 iobase)
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* Set the I/O base for the device.
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*
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* The I/O base is at registers 'index' and 'index + 1', since these are
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* 8 bit registers and the I/O base is 16 bits. Typical values for 'index'
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* are 0x60 or 0x62.
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*
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* Code must have selected the proper logical device (LDN) using
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* rawpnp_set_logical_device() beforehand.
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*
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* @param port The device I/O port.
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* @param index The index port.
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* @param iobase The 16 bit I/O base.
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*/
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void rawpnp_set_iobase(u16 port, u8 index, u16 iobase)
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{
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/* Index == 0x60 or 0x62 */
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rawpnp_write_config(dev, index + 0, (iobase >> 8) & 0xff);
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rawpnp_write_config(dev, index + 1, iobase & 0xff);
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rawpnp_write_config(port, index + 0, (iobase >> 8) & 0xff); /* MSB */
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rawpnp_write_config(port, index + 1, iobase & 0xff); /* LSB */
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}
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@ -23,13 +23,13 @@
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#include <types.h>
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#include <device/device.h>
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/* very low level pnp manipulation intended for stage 0 or 1 */
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void rawpnp_enter_ext_func_mode(u16 dev);
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void rawpnp_exit_ext_func_mode(u16 dev);
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void rawpnp_write_config(u16 dev, u8 reg, u8 value);
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void rawpnp_set_logical_device(u16 dev, u8 which);
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void rawpnp_set_enable(u16 dev, int enable);
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void rawpnp_set_iobase(u16 dev, u8 index, u16 iobase);
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/* Very low-level PNP functions, mostly intended for stage 0 or 1 */
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void rawpnp_enter_ext_func_mode(u16 port);
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void rawpnp_exit_ext_func_mode(u16 port);
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void rawpnp_write_config(u16 port, u8 reg, u8 value);
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void rawpnp_set_logical_device(u16 port, u8 ldn);
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void rawpnp_set_enable(u16 port, int enable);
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void rawpnp_set_iobase(u16 port, u8 index, u16 iobase);
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/* Primitive pnp resource manipulation */
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void pnp_write_config(struct device * dev, u8 reg, u8 value);
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