soc/amd/common/psp/psp_smi_flash: introduce common data structures

The request buffer data structures differ between the PSP generation 1
and 2 in the way that the generation 2 added the 64 bit target NV ID
field right at the beginning of the request buffer data structures. In
order to make the data structure definitions common, remove the
target_nv_id struct element via the preprocessor in case the
SOC_AMD_COMMON_BLOCK_PSP_GEN2 option isn't selected. Since the request
buffer data structures are now common for both generations, also remove
the 'v2' from the struct names.

Document #54267 revision 1.06 was used as reference for the 1st PSP
generation and document #55758 revision 2.04 was used for the 2nd PSP
generation.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Ibe0bd2d8e6a5c39cc67a49e7bb3a51ce0900a39a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84063
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
This commit is contained in:
Felix Held 2024-08-24 00:14:52 +02:00
commit ef8fdd9d3e
3 changed files with 40 additions and 34 deletions

View file

@ -11,13 +11,13 @@
#include "psp_def.h"
#include "psp_smi_flash.h"
static bool is_valid_rw_byte_count(struct mbox_pspv2_cmd_spi_read_write *cmd_buf,
static bool is_valid_rw_byte_count(struct mbox_psp_cmd_spi_read_write *cmd_buf,
u64 num_bytes)
{
const u32 cmd_buf_size = read32(&cmd_buf->header.size);
const size_t payload_buffer_offset =
offsetof(struct mbox_pspv2_cmd_spi_read_write, req) +
offsetof(struct pspv2_spi_read_write_request, buffer);
offsetof(struct mbox_psp_cmd_spi_read_write, req) +
offsetof(struct psp_spi_read_write_request, buffer);
return num_bytes <= cmd_buf_size - payload_buffer_offset;
}
@ -91,8 +91,8 @@ static bool spi_controller_available(void)
enum mbox_p2c_status psp_smi_spi_get_info(struct mbox_default_buffer *buffer)
{
struct mbox_pspv2_cmd_spi_info *const cmd_buf =
(struct mbox_pspv2_cmd_spi_info *)buffer;
struct mbox_psp_cmd_spi_info *const cmd_buf =
(struct mbox_psp_cmd_spi_info *)buffer;
const struct spi_flash *flash;
struct region_device store;
u64 target_nv_id;
@ -131,8 +131,8 @@ enum mbox_p2c_status psp_smi_spi_get_info(struct mbox_default_buffer *buffer)
enum mbox_p2c_status psp_smi_spi_read(struct mbox_default_buffer *buffer)
{
struct mbox_pspv2_cmd_spi_read_write *const cmd_buf =
(struct mbox_pspv2_cmd_spi_read_write *)buffer;
struct mbox_psp_cmd_spi_read_write *const cmd_buf =
(struct mbox_psp_cmd_spi_read_write *)buffer;
enum mbox_p2c_status ret;
u64 target_nv_id;
u64 lba;
@ -180,8 +180,8 @@ enum mbox_p2c_status psp_smi_spi_read(struct mbox_default_buffer *buffer)
enum mbox_p2c_status psp_smi_spi_write(struct mbox_default_buffer *buffer)
{
struct mbox_pspv2_cmd_spi_read_write *const cmd_buf =
(struct mbox_pspv2_cmd_spi_read_write *)buffer;
struct mbox_psp_cmd_spi_read_write *const cmd_buf =
(struct mbox_psp_cmd_spi_read_write *)buffer;
enum mbox_p2c_status ret;
u64 target_nv_id;
u64 lba;
@ -229,8 +229,8 @@ enum mbox_p2c_status psp_smi_spi_write(struct mbox_default_buffer *buffer)
enum mbox_p2c_status psp_smi_spi_erase(struct mbox_default_buffer *buffer)
{
struct mbox_pspv2_cmd_spi_erase *const cmd_buf =
(struct mbox_pspv2_cmd_spi_erase *)buffer;
struct mbox_psp_cmd_spi_erase *const cmd_buf =
(struct mbox_psp_cmd_spi_erase *)buffer;
enum mbox_p2c_status ret;
u64 target_nv_id;
u64 lba;

View file

@ -8,49 +8,55 @@ enum psp_spi_id_type {
SMI_TARGET_RPMC_NVRAM = 5,
};
struct pspv2_spi_info_request {
struct psp_spi_info_request {
#if CONFIG(SOC_AMD_COMMON_BLOCK_PSP_GEN2)
u64 target_nv_id;
#endif
u64 lba;
u64 block_size;
u64 num_blocks;
} __packed;
struct mbox_pspv2_cmd_spi_info {
struct mbox_psp_cmd_spi_info {
struct mbox_buffer_header header;
struct pspv2_spi_info_request req;
struct psp_spi_info_request req;
} __packed;
struct pspv2_spi_read_write_request {
struct psp_spi_read_write_request {
#if CONFIG(SOC_AMD_COMMON_BLOCK_PSP_GEN2)
u64 target_nv_id;
#endif
u64 lba;
u64 offset;
u64 num_bytes;
u8 buffer[];
} __packed;
struct mbox_pspv2_cmd_spi_read_write {
struct mbox_psp_cmd_spi_read_write {
struct mbox_buffer_header header;
struct pspv2_spi_read_write_request req;
struct psp_spi_read_write_request req;
} __packed;
struct pspv2_spi_erase_request {
struct psp_spi_erase_request {
#if CONFIG(SOC_AMD_COMMON_BLOCK_PSP_GEN2)
u64 target_nv_id;
#endif
u64 lba;
u64 num_blocks;
} __packed;
struct mbox_pspv2_cmd_spi_erase {
struct mbox_psp_cmd_spi_erase {
struct mbox_buffer_header header;
struct pspv2_spi_erase_request req;
struct psp_spi_erase_request req;
} __packed;
bool is_valid_psp_spi_info(struct mbox_pspv2_cmd_spi_info *cmd_buf);
bool is_valid_psp_spi_read_write(struct mbox_pspv2_cmd_spi_read_write *cmd_buf);
bool is_valid_psp_spi_erase(struct mbox_pspv2_cmd_spi_erase *cmd_buf);
u64 get_psp_spi_info_id(struct mbox_pspv2_cmd_spi_info *cmd_buf);
void set_psp_spi_info(struct mbox_pspv2_cmd_spi_info *cmd_buf, u64 lba, u64 block_size,
bool is_valid_psp_spi_info(struct mbox_psp_cmd_spi_info *cmd_buf);
bool is_valid_psp_spi_read_write(struct mbox_psp_cmd_spi_read_write *cmd_buf);
bool is_valid_psp_spi_erase(struct mbox_psp_cmd_spi_erase *cmd_buf);
u64 get_psp_spi_info_id(struct mbox_psp_cmd_spi_info *cmd_buf);
void set_psp_spi_info(struct mbox_psp_cmd_spi_info *cmd_buf, u64 lba, u64 block_size,
u64 num_blocks);
void get_psp_spi_read_write(struct mbox_pspv2_cmd_spi_read_write *cmd_buf, u64 *target_nv_id,
void get_psp_spi_read_write(struct mbox_psp_cmd_spi_read_write *cmd_buf, u64 *target_nv_id,
u64 *lba, u64 *offset, u64 *num_bytes, u8 **data);
void get_psp_spi_erase(struct mbox_pspv2_cmd_spi_erase *cmd_buf, u64 *target_nv_id, u64 *lba,
void get_psp_spi_erase(struct mbox_psp_cmd_spi_erase *cmd_buf, u64 *target_nv_id, u64 *lba,
u64 *num_blocks);

View file

@ -11,27 +11,27 @@ static bool is_valid_psp_spi_id(u64 target_nv_id)
target_nv_id == SMI_TARGET_RPMC_NVRAM;
}
bool is_valid_psp_spi_info(struct mbox_pspv2_cmd_spi_info *cmd_buf)
bool is_valid_psp_spi_info(struct mbox_psp_cmd_spi_info *cmd_buf)
{
return is_valid_psp_spi_id(read64(&cmd_buf->req.target_nv_id));
}
bool is_valid_psp_spi_read_write(struct mbox_pspv2_cmd_spi_read_write *cmd_buf)
bool is_valid_psp_spi_read_write(struct mbox_psp_cmd_spi_read_write *cmd_buf)
{
return is_valid_psp_spi_id(read64(&cmd_buf->req.target_nv_id));
}
bool is_valid_psp_spi_erase(struct mbox_pspv2_cmd_spi_erase *cmd_buf)
bool is_valid_psp_spi_erase(struct mbox_psp_cmd_spi_erase *cmd_buf)
{
return is_valid_psp_spi_id(read64(&cmd_buf->req.target_nv_id));
}
u64 get_psp_spi_info_id(struct mbox_pspv2_cmd_spi_info *cmd_buf)
u64 get_psp_spi_info_id(struct mbox_psp_cmd_spi_info *cmd_buf)
{
return read64(&cmd_buf->req.target_nv_id);
}
void set_psp_spi_info(struct mbox_pspv2_cmd_spi_info *cmd_buf, u64 lba, u64 block_size,
void set_psp_spi_info(struct mbox_psp_cmd_spi_info *cmd_buf, u64 lba, u64 block_size,
u64 num_blocks)
{
write64(&cmd_buf->req.lba, lba);
@ -39,7 +39,7 @@ void set_psp_spi_info(struct mbox_pspv2_cmd_spi_info *cmd_buf, u64 lba, u64 bloc
write64(&cmd_buf->req.num_blocks, num_blocks);
}
void get_psp_spi_read_write(struct mbox_pspv2_cmd_spi_read_write *cmd_buf, u64 *target_nv_id,
void get_psp_spi_read_write(struct mbox_psp_cmd_spi_read_write *cmd_buf, u64 *target_nv_id,
u64 *lba, u64 *offset, u64 *num_bytes, u8 **data)
{
*target_nv_id = read64(&cmd_buf->req.target_nv_id);
@ -49,7 +49,7 @@ void get_psp_spi_read_write(struct mbox_pspv2_cmd_spi_read_write *cmd_buf, u64 *
*data = cmd_buf->req.buffer;
}
void get_psp_spi_erase(struct mbox_pspv2_cmd_spi_erase *cmd_buf, u64 *target_nv_id, u64 *lba,
void get_psp_spi_erase(struct mbox_psp_cmd_spi_erase *cmd_buf, u64 *target_nv_id, u64 *lba,
u64 *num_blocks)
{
*target_nv_id = read64(&cmd_buf->req.target_nv_id);