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UPSTREAM: PCI ops: Remove pci_mmio_xx() in ramstage

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MMCONF operations are already the default so these
would never be used.

BUG=None
BRANCH=None
TEST=None

Signed-off-by: Kysti Mlkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/17691
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

Change-Id: I671f3d2847742e400bc4ecfccc088e3b79d43070
Reviewed-on: https://chromium-review.googlesource.com/417944
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Kyösti Mälkki 2016-12-02 08:06:55 +02:00 • committed by chrome-bot
commit ef59bb700e
2 changed files with 0 additions and 53 deletions
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45
src/device/pci_ops.c
View file

@ -118,48 +118,3 @@ void pci_write_config32(struct device *dev, unsigned int where, u32 val)
pci_bus_ops(pbus, dev)->write32(pbus, dev->bus->secondary,
dev->path.pci.devfn, where, val);
}
#if CONFIG_MMCONF_SUPPORT
u8 pci_mmio_read_config8(struct device *dev, unsigned int where)
{
struct bus *pbus = get_pbus(dev);
return pci_ops_mmconf.read8(pbus, dev->bus->secondary,
dev->path.pci.devfn, where);
}
u16 pci_mmio_read_config16(struct device *dev, unsigned int where)
{
struct bus *pbus = get_pbus(dev);
return pci_ops_mmconf.read16(pbus, dev->bus->secondary,
dev->path.pci.devfn, where);
}
u32 pci_mmio_read_config32(struct device *dev, unsigned int where)
{
struct bus *pbus = get_pbus(dev);
return pci_ops_mmconf.read32(pbus, dev->bus->secondary,
dev->path.pci.devfn, where);
}
void pci_mmio_write_config8(struct device *dev, unsigned int where, u8 val)
{
struct bus *pbus = get_pbus(dev);
pci_ops_mmconf.write8(pbus, dev->bus->secondary, dev->path.pci.devfn,
where, val);
}
void pci_mmio_write_config16(struct device *dev, unsigned int where, u16 val)
{
struct bus *pbus = get_pbus(dev);
pci_ops_mmconf.write16(pbus, dev->bus->secondary, dev->path.pci.devfn,
where, val);
}
void pci_mmio_write_config32(struct device *dev, unsigned int where, u32 val)
{
struct bus *pbus = get_pbus(dev);
pci_ops_mmconf.write32(pbus, dev->bus->secondary, dev->path.pci.devfn,
where, val);
}
#endif

8
src/include/device/pci_ops.h
View file

@ -13,14 +13,6 @@ void pci_write_config8(struct device *dev, unsigned int where, u8 val);
void pci_write_config16(struct device *dev, unsigned int where, u16 val);
void pci_write_config32(struct device *dev, unsigned int where, u32 val);
#if CONFIG_MMCONF_SUPPORT
u8 pci_mmio_read_config8(struct device *dev, unsigned int where);
u16 pci_mmio_read_config16(struct device *dev, unsigned int where);
u32 pci_mmio_read_config32(struct device *dev, unsigned int where);
void pci_mmio_write_config8(struct device *dev, unsigned int where, u8 val);
void pci_mmio_write_config16(struct device *dev, unsigned int where, u16 val);
void pci_mmio_write_config32(struct device *dev, unsigned int where, u32 val);
#endif
#endif
#endif /* PCI_OPS_H */