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mb/google/ocelot: Drop redundant SNDW GPIO mapping

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This patch removes redundant SNDW GPIO mapping that was already present
in fw_config.c and applied as per FW_CONFIG.

TEST=Verify that ocelot builds without any error
Change-Id: I8ba76d77764d4b9cec22c79b977ad9e486ae804e
Signed-off-by: Avi Uday <aviuday@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/88937
Reviewed-by: Pranava Y N <pranavayn@google.com>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Avi Uday 2025-08-25 18:21:34 +05:30 • committed by Matt DeVillier
commit ec69479bdb
1 changed files with 0 additions and 18 deletions
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18
src/mainboard/google/ocelot/variants/ocelot/gpio.c
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@ -296,24 +296,6 @@ static const struct pad_config gpio_table[] = {
/* GPP_H24: TP */
PAD_CFG_NF(GPP_H24, NONE, DEEP, NF1),
/* GPP_S */
/* GPP_S00: SNDW3_CLK_CODEC (HDR) */
PAD_CFG_NF(GPP_S00, NONE, DEEP, NF1),
/* GPP_S01: SNDW3_DATA0_CODEC (HDR) */
PAD_CFG_NF(GPP_S01, NONE, DEEP, NF1),
/* GPP_S02: SNDW3_DATA1_CODEC (HDR) */
PAD_CFG_NF(GPP_S02, NONE, DEEP, NF1),
/* GPP_S03: SNDW3_DATA2_CODEC (HDR) */
PAD_CFG_NF(GPP_S03, NONE, DEEP, NF1),
/* GPP_S04: DMIC0_CLK (HDR) */
PAD_CFG_NF(GPP_S04, NONE, DEEP, NF5),
/* GPP_S05: DMIC0_DATA (HDR) */
PAD_CFG_NF(GPP_S05, NONE, DEEP, NF5),
/* GPP_S06: DMIC1_CLK (HDR) */
PAD_CFG_NF(GPP_S06, NONE, DEEP, NF5),
/* GPP_S07: DMIC1_DATA (HDR) */
PAD_CFG_NF(GPP_S07, NONE, DEEP, NF5),
/* GPP_V */
/* GPP_V00: PM_BATLOW_N */
PAD_CFG_NF(GPP_V00, NONE, DEEP, NF1),