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soc/intel/xeon_sp: Guard function prototypes

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Guard function prototypes to allow the header to be used in ACPI
ASL code. The defines will be used in the next commit.

Change-Id: Id6c361155c914f168577833279b4b7cc317b2eec
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/85595
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Shuo Liu <shuo.liu@intel.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Patrick Rudolph 2024-12-14 10:58:15 +01:00
commit ec2d7077b5
1 changed files with 9 additions and 7 deletions
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16
src/soc/intel/xeon_sp/include/soc/acpi.h
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@ -3,6 +3,7 @@
#ifndef _SOC_ACPI_H_
#define _SOC_ACPI_H_
#ifndef __ACPI__
#include <acpi/acpi.h>
#define MAX_SRAT_MEM_ENTRIES_PER_IMC 8
@ -23,6 +24,14 @@ unsigned long cxl_fill_srat(unsigned long current);
void iio_domain_set_acpi_name(struct device *dev, const char *prefix);
void acpigen_write_OSC_pci_domain_fixed_caps(const struct device *domain,
const uint32_t granted_pcie_features,
const bool is_cxl_domain,
const uint32_t granted_cxl_features);
void acpigen_write_pci_root_port(const struct device *rp);
void acpigen_write_PRT_pre_routed(const struct device *br);
#endif
#define PCIE_NATIVE_HOTPLUG_CONTROL 0x01
#define SHPC_NATIVE_HOTPLUG_CONTROL 0x02
#define PCIE_PME_CONTROL 0x04
@ -33,11 +42,4 @@ void iio_domain_set_acpi_name(struct device *dev, const char *prefix);
#define CXL_ERROR_REPORTING_CONTROL 0x01
void acpigen_write_OSC_pci_domain_fixed_caps(const struct device *domain,
const uint32_t granted_pcie_features,
const bool is_cxl_domain,
const uint32_t granted_cxl_features);
void acpigen_write_pci_root_port(const struct device *rp);
void acpigen_write_PRT_pre_routed(const struct device *br);
#endif /* _SOC_ACPI_H_ */