mb/google/ocelot/var/ojal: Enable FPS and update FW config

This patch enables fingerprint sensor in devicetree for ojal and updates FW config for GPIO's config according to schematics revision 0.9.
RDC kit no:840138

BUG=b:437459757
TEST=Build ojal board and check dmesg for FPS detection.

Change-Id: I44a24423f4d5b1fc85a5b3bb51f2d6646c82f9dc
Signed-off-by: Varun Upadhyay <varun.upadhyay@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/89324
Reviewed-by: Pranava Y N <pranavayn@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Varun Upadhyay 2025-09-24 09:42:15 +05:30 committed by Matt DeVillier
commit ec2875e38f
2 changed files with 65 additions and 0 deletions

View file

@ -93,6 +93,45 @@ static const struct pad_config touchpad_i2c_disable_pads[] = {
PAD_NC(GPP_VGPIO3_THC1, NONE),
};
static const struct pad_config fp_disable_pads[] = {
/* GPP_C15: FPS_RST_N */
PAD_NC(GPP_C15, NONE),
/* GPP_E19: FPS_SOC_INT_L */
PAD_NC(GPP_E19, NONE),
/* GPP_E20: FPMCU_FW_UPDATE */
PAD_NC(GPP_E20, NONE),
/* GPP_F14: GPP_F14_GPSI0A_MOSI */
PAD_NC(GPP_F14, NONE),
/* GPP_F15: GPP_F15_GSPI0A_MISO */
PAD_NC(GPP_F15, NONE),
/* GPP_F16: GPP_F16_GPSI0A_CLK */
PAD_NC(GPP_F16, NONE),
/* GPP_F18: GPP_F18_GSPI0_CS0 */
PAD_NC(GPP_F18, NONE),
};
static const struct pad_config fp_enable_pads[] = {
/* GPP_C15: FPS_RST_N */
PAD_CFG_GPO_LOCK(GPP_C15, 1, LOCK_CONFIG),
/* GPP_E19: FPS_SOC_INT_L */
PAD_CFG_GPI_IRQ_WAKE(GPP_E19, NONE, PWROK, LEVEL, INVERT),
/* GPP_E20: FPMCU_FW_UPDATE */
PAD_CFG_GPO_LOCK(GPP_E20, 0, LOCK_CONFIG),
/* GPP_F14: GPP_F14_GPSI0A_MOSI */
PAD_CFG_NF(GPP_F14, NONE, DEEP, NF8),
/* GPP_F15: GPP_F15_GSPI0A_MISO */
PAD_CFG_NF(GPP_F15, NONE, DEEP, NF8),
/* GPP_F16: GPP_F16_GPSI0A_CLK */
PAD_CFG_NF(GPP_F16, NONE, DEEP, NF8),
/* GPP_F18: GPP_F18_GSPI0_CS0 */
PAD_CFG_NF(GPP_F18, NONE, DEEP, NF8),
};
static const struct pad_config pre_mem_fp_enable_pads[] = {
/* GPP_C15: FPS_RST_N */
PAD_CFG_GPO(GPP_C15, 0, DEEP),
};
void fw_config_configure_pre_mem_gpio(void)
{
if (!fw_config_is_provisioned()) {
@ -105,6 +144,9 @@ void fw_config_configure_pre_mem_gpio(void)
} else if (fw_config_probe(FW_CONFIG(STORAGE, STORAGE_UNKNOWN))) {
GPIO_CONFIGURE_PADS(pre_mem_gen4_ssd_pwr_pads);
}
if (fw_config_probe(FW_CONFIG(FP, FP_PRESENT)))
GPIO_CONFIGURE_PADS(pre_mem_fp_enable_pads);
}
void fw_config_gpio_padbased_override(struct pad_config *padbased_table)
@ -137,4 +179,10 @@ void fw_config_gpio_padbased_override(struct pad_config *padbased_table)
} else {
GPIO_PADBASED_OVERRIDE(padbased_table, touchpad_i2c_disable_pads);
}
if (fw_config_probe(FW_CONFIG(FP, FP_PRESENT))) {
GPIO_PADBASED_OVERRIDE(padbased_table, fp_enable_pads);
} else {
GPIO_PADBASED_OVERRIDE(padbased_table, fp_disable_pads);
}
}

View file

@ -284,6 +284,23 @@ chip soc/intel/pantherlake
end
end
device ref gspi0 on
chip drivers/spi/acpi
register "name" = ""CRFP""
register "hid" = "ACPI_DT_NAMESPACE_HID"
register "uid" = "1"
register "compat_string" = ""google,cros-ec-spi""
register "irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_E19_IRQ)"
register "wake" = "GPE0_DW2_19"
register "has_power_resource" = "true"
register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C15)"
register "enable_delay_ms" = "3"
device spi 0 on
probe FP FP_PRESENT
end
end # FPMCU
end
device ref smbus on end
end
end