From ebc2030ff78363507e8f5a8dfda42c7b62130dfe Mon Sep 17 00:00:00 2001 From: Zhixing Ma Date: Wed, 16 Jul 2025 09:32:44 -0700 Subject: [PATCH] soc/intel/pantherlake: Enable HW managed microphone privacy MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Enable hardware-managed microphone privacy by setting the PchHdaMicPrivacyMode FSP UPD to 1. This feature was enabled by default in FSP previously but has since changed to disabled by default, so now coreboot explicitly enables this as it is a desired feature for Chrome platforms. The hardware-managed microphone privacy feature allows the platform to control the microphone mute state at the hardware level for enhanced privacy. TEST=Verify UPD value is set correctly and HW managed mic privacy is working as expected. Change-Id: I9a20bd129103aae35550104f6a7025484ef5e9c1 Signed-off-by: Zhixing Ma Reviewed-on: https://review.coreboot.org/c/coreboot/+/88451 Reviewed-by: Jérémy Compostella Tested-by: build bot (Jenkins) Reviewed-by: --- src/soc/intel/pantherlake/fsp_params.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/soc/intel/pantherlake/fsp_params.c b/src/soc/intel/pantherlake/fsp_params.c index e423986d53..0976d3bb77 100644 --- a/src/soc/intel/pantherlake/fsp_params.c +++ b/src/soc/intel/pantherlake/fsp_params.c @@ -730,6 +730,7 @@ static void fill_fsps_audio_params(FSP_S_CONFIG *s_cfg, s_cfg->PchHdaMicPrivacyHwModeSoundWire3 = 1; s_cfg->PchHdaMicPrivacyHwModeSoundWire4 = 1; s_cfg->PchHdaMicPrivacyHwModeDmic = 1; + s_cfg->PchHdaMicPrivacyMode = 1; } static void fill_fsps_iax_params(FSP_S_CONFIG *s_cfg,