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Unify crt0s setup to src/arch/i386/Makefile.inc. This variable

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is not something users have to concern themselves with anymore.

Also fixes some wrong romstrap configs for boards, fixing a couple
of them.

Also add "make printcrt0s" target for debugging crt0s when updating
modified checkouts.

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5162 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Patrick Georgi 2010-02-25 17:03:17 +00:00
commit eb49f9d04f
50 changed files with 97 additions and 325 deletions
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7
src/mainboard/intel/d945gclf/Makefile.inc
View file

@ -35,13 +35,6 @@ smmobj-$(CONFIG_HAVE_SMI_HANDLER) += mainboard_smi.o
# This is part of the conversion to init-obj and away from included code.
initobj-y += crt0.o
# FIXME in $(top)/Makefile
crt0s := $(src)/cpu/x86/16bit/entry16.inc
crt0s += $(src)/cpu/x86/32bit/entry32.inc
crt0s += $(src)/cpu/x86/16bit/reset16.inc
crt0s += $(src)/arch/i386/lib/id.inc
crt0s += $(src)/cpu/intel/model_6ex/cache_as_ram.inc
crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
ldscripts += $(src)/cpu/x86/16bit/entry16.lds

7
src/mainboard/intel/eagleheights/Makefile.inc
View file

@ -9,14 +9,7 @@ obj-$(CONFIG_HAVE_HARD_RESET) += reset.o
# This is part of the conversion to init-obj and away from included code.
initobj-y += crt0.o
# FIXME in $(top)/Makefile
crt0s := $(src)/cpu/x86/16bit/entry16.inc
crt0s += $(src)/cpu/x86/32bit/entry32.inc
crt0s += $(src)/cpu/x86/16bit/reset16.inc
crt0s += $(src)/arch/i386/lib/id.inc
# Use Intel Core (not Core 2) code for CAR init, any CPU might be used.
crt0s += $(src)/cpu/intel/model_6ex/cache_as_ram.inc
crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
ldscripts += $(src)/cpu/x86/16bit/entry16.lds