From eb3497fae4815b3749cc3935363ddac3e61052b1 Mon Sep 17 00:00:00 2001
From: Hualin Wei <weihualin@huaqin.corp-partner.google.com>
Date: Mon, 22 Sep 2025 20:29:48 +0800
Subject: [PATCH] mb/google/fatcat/var/lapis: Update tpm i2c configuration

Make I2C3 enabled for early init.

BUG=b:438785495
TEST=emerge-fatcat coreboot

Change-Id: Ia5a48dde252f8d1dc552229bc2d33f1e7adf2e98
Signed-off-by: Hualin Wei <weihualin@huaqin.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/89290
Reviewed-by: Pranava Y N <pranavayn@google.com>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
 src/mainboard/google/fatcat/variants/lapis/overridetree.cb | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/mainboard/google/fatcat/variants/lapis/overridetree.cb b/src/mainboard/google/fatcat/variants/lapis/overridetree.cb
index f86cf47a79..429c546e99 100644
--- a/src/mainboard/google/fatcat/variants/lapis/overridetree.cb
+++ b/src/mainboard/google/fatcat/variants/lapis/overridetree.cb
@@ -57,6 +57,7 @@ chip soc/intel/pantherlake
 	register "common_soc_config" = "{
 		.logo_valignment = FW_SPLASH_VALIGNMENT_MIDDLE,
 		.i2c[3] = {
+			.early_init=1,
 			.speed = I2C_SPEED_FAST,
 		},
 	}"