From eae4c1aa6ed4bdc1c76128d3e407f4db76761267 Mon Sep 17 00:00:00 2001 From: Antonello Dettori Date: Sat, 3 Sep 2016 10:45:33 +0200 Subject: [PATCH] UPSTREAM: southbridge/intel/i3100: transition away from device_t Replace the use of the old device_t definition inside southbridge/intel/i3100. BUG=None BRANCH=None TEST=None Signed-off-by: Antonello Dettori Reviewed-on: https://review.coreboot.org/16482 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth Change-Id: Ic9616d5135cfb7206e086e51aaf82eb66540c4bb Reviewed-on: https://chromium-review.googlesource.com/384956 Commit-Ready: Furquan Shaikh Tested-by: Furquan Shaikh Reviewed-by: Aaron Durbin --- src/southbridge/intel/i3100/early_smbus.c | 2 +- src/southbridge/intel/i3100/i3100.h | 2 ++ 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/src/southbridge/intel/i3100/early_smbus.c b/src/southbridge/intel/i3100/early_smbus.c index 2cb241a138..35c32a41c1 100644 --- a/src/southbridge/intel/i3100/early_smbus.c +++ b/src/southbridge/intel/i3100/early_smbus.c @@ -20,7 +20,7 @@ static void enable_smbus(void) { - device_t dev = PCI_DEV(0x0, 0x1f, 0x3); + pci_devfn_t dev = PCI_DEV(0x0, 0x1f, 0x3); printk(BIOS_SPEW, "SMBus controller enabled\n"); pci_write_config32(dev, 0x20, SMBUS_IO_BASE | 1); diff --git a/src/southbridge/intel/i3100/i3100.h b/src/southbridge/intel/i3100/i3100.h index 85b30b6bc6..297a2a688d 100644 --- a/src/southbridge/intel/i3100/i3100.h +++ b/src/southbridge/intel/i3100/i3100.h @@ -36,6 +36,8 @@ #define SATA_MODE_IDE 0x00 #define SATA_MODE_AHCI 0x01 +#ifndef __SIMPLE_DEVICE__ void i3100_enable(device_t dev); +#endif #endif