From eaae0ce699105151485e729bca8fce50e9610fdd Mon Sep 17 00:00:00 2001 From: Sean Rhodes Date: Tue, 1 Apr 2025 21:32:27 +0100 Subject: [PATCH] mb/starlabs/starbook/adl_n: Reconfigure PCH Strap GPIOs Configure all strap GPIOs as outputs, rather than some being not connected. This doesn't change anything, but is more explicit. Set these all to sample on RSMRST. Change-Id: I779b6bc486b68e8df50347540364901507a7102c Signed-off-by: Sean Rhodes Reviewed-on: https://review.coreboot.org/c/coreboot/+/87083 Tested-by: build bot (Jenkins) Reviewed-by: Matt DeVillier --- .../starlabs/starbook/variants/adl_n/gpio.c | 22 +++++++++---------- 1 file changed, 11 insertions(+), 11 deletions(-) diff --git a/src/mainboard/starlabs/starbook/variants/adl_n/gpio.c b/src/mainboard/starlabs/starbook/variants/adl_n/gpio.c index 43f2213fae..9edd864ffb 100644 --- a/src/mainboard/starlabs/starbook/variants/adl_n/gpio.c +++ b/src/mainboard/starlabs/starbook/variants/adl_n/gpio.c @@ -81,17 +81,17 @@ const struct pad_config gpio_table[] = { /* Config Straps [ Low / High ] */ PAD_CFG_GPO(GPP_B14, 0, RSMRST), /* Top Swap [ Disabled / Enabled ] */ - PAD_NC(GPP_B18, NONE), /* Reboot Support [ Enabled / Disabled ] */ - PAD_CFG_GPO(GPP_C2, 1, PLTRST), /* TLS Confidentiality [ Disabled / Enabled ] */ - PAD_CFG_GPO(GPP_C5, 0, PLTRST), /* eSPI [ Enabled / Disabled ] */ - PAD_CFG_GPO(GPP_E6, 0, DEEP), /* JTAG ODT [ Disabled / Enabled ] */ - PAD_CFG_GPO(GPP_H1, 0, DEEP), /* BFX Strap 2 Bit 3 [ Disabled / Enabled ] */ - PAD_NC(GPP_F2, NONE), /* M.2 CNVi [ Enabled / Disabled ] */ - PAD_NC(GPP_E19, NONE), /* TBT LSX #0 [ 1.8V / 3.3V ] */ - PAD_NC(GPP_E21, NONE), /* TBT LSX #1 [ 1.8V / 3.3V ] */ - PAD_NC(GPP_D12, NONE), /* TBT LSX #3 [ 1.8V / 3.3V ] */ - PAD_CFG_GPO(GPP_F7, 0, DEEP), /* MCRO LDO [ Disabled / Bypass ] */ - PAD_CFG_GPO(GPD7, 0, PWROK), /* RTC Clock Delay [ Disabled / 95ms ] */ + PAD_CFG_GPO(GPP_B18, 0, RSMRST), /* Reboot Support [ Enabled / Disabled ] */ + PAD_CFG_GPO(GPP_C2, 1, RSMRST), /* TLS Confidentiality [ Disabled / Enabled ] */ + PAD_CFG_GPO(GPP_C5, 0, RSMRST), /* eSPI [ Enabled / Disabled ] */ + PAD_CFG_GPO(GPP_E6, 0, RSMRST), /* JTAG ODT [ Disabled / Enabled ] */ + PAD_CFG_GPO(GPP_H1, 0, RSMRST), /* BFX Strap 2 Bit 3 [ Disabled / Enabled ] */ + PAD_CFG_GPO(GPP_F2, 0, RSMRST), /* M.2 CNVi [ Enabled / Disabled ] */ + PAD_CFG_GPO(GPP_E19, 0, RSMRST), /* TBT LSX #0 [ 1.8V / 3.3V ] */ + PAD_CFG_GPO(GPP_E21, 0, RSMRST), /* TBT LSX #1 [ 1.8V / 3.3V ] */ + PAD_CFG_GPO(GPP_D12, 0, RSMRST), /* TBT LSX #3 [ 1.8V / 3.3V ] */ + PAD_CFG_GPO(GPP_F7, 0, RSMRST), /* MCRO LDO [ Disabled / Bypass ] */ + PAD_CFG_GPO(GPD7, 0, RSMRST), /* RTC Clock Delay [ Disabled / 95ms ] */ PAD_NC(GPD2, NONE), PAD_NC(GPD6, NONE),