From ea9fb6393ee80da77c9fbc30f605859c7009c9ed Mon Sep 17 00:00:00 2001 From: Hung-Te Lin Date: Fri, 8 Nov 2013 17:38:38 +0800 Subject: [PATCH] tegra124: Allow enabling clock output for external peripherals. Some peripherals, like audio codecs, need clock outputs from Tegra chip. The new clock_external_output(clk_id) allows enabling any of the three clock outputs. BUG=none TEST=emerge-nyan chromeos-coreboot-nyan BRANCH=none Change-Id: I05a1ffb80077d3b14751bfa0e7c47d541a103a08 Signed-off-by: Hung-Te Lin Reviewed-on: https://chromium-review.googlesource.com/176108 Reviewed-by: Gabe Black Reviewed-by: David Hendricks --- src/soc/nvidia/tegra124/clock.c | 20 ++++++++++++++++++++ src/soc/nvidia/tegra124/include/soc/clock.h | 1 + 2 files changed, 21 insertions(+) diff --git a/src/soc/nvidia/tegra124/clock.c b/src/soc/nvidia/tegra124/clock.c index 1da5426ee4..e1494c80c9 100644 --- a/src/soc/nvidia/tegra124/clock.c +++ b/src/soc/nvidia/tegra124/clock.c @@ -305,6 +305,26 @@ void clock_early_uart(void) clrbits_le32(&clk_rst->rst_dev_l, CLK_L_UARTA); } +/* Enable output clock (CLK1~3) for external peripherals. */ +void clock_external_output(int clk_id) +{ + switch (clk_id) { + case 1: + setbits_le32(&pmc->clk_out_cntrl, 1 << 2); + break; + case 2: + setbits_le32(&pmc->clk_out_cntrl, 1 << 10); + break; + case 3: + setbits_le32(&pmc->clk_out_cntrl, 1 << 18); + break; + default: + printk(BIOS_CRIT, "ERROR: Unknown output clock id %d\n", + clk_id); + break; + } +} + void clock_cpu0_config_and_reset(void *entry) { void * const evp_cpu_reset = (uint8_t *)TEGRA_EVP_BASE + 0x100; diff --git a/src/soc/nvidia/tegra124/include/soc/clock.h b/src/soc/nvidia/tegra124/include/soc/clock.h index 234ae21249..75acdb9bcc 100644 --- a/src/soc/nvidia/tegra124/include/soc/clock.h +++ b/src/soc/nvidia/tegra124/include/soc/clock.h @@ -239,6 +239,7 @@ enum clock_source { /* Careful: Not true for all sources, always check TRM! */ int clock_get_osc_khz(void); void clock_early_uart(void); +void clock_external_output(int clk_id); void clock_cpu0_config_and_reset(void * entry); void clock_enable_clear_reset(u32 l, u32 h, u32 u, u32 v, u32 w, u32 x); void clock_init(void);