From ea8a3e685f6c083bead7d387747ae756f4140005 Mon Sep 17 00:00:00 2001 From: Jeremy Compostella Date: Thu, 12 Jun 2025 10:19:15 -0700 Subject: [PATCH] soc/intel/cmn/blk/cnvi: Add descriptive comments for PRRS and RSTT Enhance the readability and maintainability of the code by adding detailed comments for the ACPI names "PRRS" and "RSTT" in the `cnvw_fill_ssdt` function. These comments clarify the possible status values for "PRRS" and the reset types for "RSTT", aiding developers in understanding the function's logic and expected behavior. Change-Id: I94486476cf2f95b8e1744ee369a9d9d6c734bba8 Signed-off-by: Jeremy Compostella Reviewed-on: https://review.coreboot.org/c/coreboot/+/88086 Reviewed-by: Wonkyu Kim Tested-by: build bot (Jenkins) Reviewed-by: Sean Rhodes --- src/soc/intel/common/block/cnvi/cnvi.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/src/soc/intel/common/block/cnvi/cnvi.c b/src/soc/intel/common/block/cnvi/cnvi.c index f155cde5fd..2a1eadb912 100644 --- a/src/soc/intel/common/block/cnvi/cnvi.c +++ b/src/soc/intel/common/block/cnvi/cnvi.c @@ -93,11 +93,20 @@ static void cnvw_fill_ssdt(const struct device *dev) /* * Name (PRRS, Zero) + * Last _PRR Status + * 0: Non-Platform-Level Device Reset (PLDR) executed [Default] + * 1: Core PLDR Completed successfully + * 2: Product PLDR Completed successfully + * 3: Previous PLDR Not Completed + * 4: Product PLDR timeout */ acpigen_write_name_integer("PRRS", 0); /* * Name (RSTT, Zero) + * Reset Type + * 0: Core Reset + * 1: Product Reset */ acpigen_write_name_integer("RSTT", 0);