From e9dc589eab03a20251fc1c5737853828afc9af21 Mon Sep 17 00:00:00 2001 From: Patrick Rudolph Date: Wed, 4 Feb 2026 10:26:45 +0100 Subject: [PATCH] soc/amd/glinda: Only allow warm reset on Faegan Select SOC_AMD_SUPPORTS_WARM_RESET on faegon only. Glinda doesn't currently support warm resets. Signed-off-by: Patrick Rudolph Change-Id: Ic7a011827d16685bb3f2a13a576b7832a4929119 Reviewed-on: https://review.coreboot.org/c/coreboot/+/91163 Tested-by: build bot (Jenkins) Reviewed-by: Felix Held --- src/soc/amd/glinda/Kconfig | 2 +- src/soc/amd/glinda/fch.c | 2 ++ 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/src/soc/amd/glinda/Kconfig b/src/soc/amd/glinda/Kconfig index 3be4725763..70a1fc6331 100644 --- a/src/soc/amd/glinda/Kconfig +++ b/src/soc/amd/glinda/Kconfig @@ -92,7 +92,6 @@ config SOC_AMD_GLINDA_BASE select X86_AMD_FIXED_MTRRS select X86_INIT_NEED_1_SIPI select HAVE_X86_64_SUPPORT - select SOC_AMD_SUPPORTS_WARM_RESET help AMD Glinda support @@ -105,6 +104,7 @@ config SOC_AMD_GLINDA config SOC_AMD_FAEGAN bool select SOC_AMD_GLINDA_BASE + select SOC_AMD_SUPPORTS_WARM_RESET help AMD Faegan support diff --git a/src/soc/amd/glinda/fch.c b/src/soc/amd/glinda/fch.c index 849e466442..1e0b08ced4 100644 --- a/src/soc/amd/glinda/fch.c +++ b/src/soc/amd/glinda/fch.c @@ -156,6 +156,8 @@ static void cgpll_clock_gate_init(void) void fch_init(void *chip_info) { + if (!CONFIG(SOC_AMD_SUPPORTS_WARM_RESET)) + set_resets_to_cold(); i2c_soc_init(); fch_init_acpi_ports();