From e94ac6e65512eb70bd11f5e863c328fd58aed134 Mon Sep 17 00:00:00 2001
From: Baozhen Yang <yangbaozhen5@huaqin.corp-partner.google.com>
Date: Thu, 3 Jul 2025 13:56:42 +0800
Subject: [PATCH] mb/google/nissa/var/pujjocento: Reduce PL4 to 38 W with no
 battery
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When battery is not present, reduce power limits to below 45W,
avoid inability to enter the system.

To avoid poor efficiency of the adapter, leave a margin and set the powerlimit to 38w.

This will check the current battery status and configure cpu power
limits using current PD power value.

BUG=b:418695656
BRANCH=None
TEST=
1、built(emerge-nissa coreboot chromeos-bootimage) and push ap firmware to dut.
2、Connect 15W machine without battery to 45W adapter and check if it starts up properly.
3、Use ec command “cbmem -c | grep PL“ to check if the PL4 value is 38 watts.

Change-Id: I72429052f5b3d25e56076176728498357a298cdd
Signed-off-by: Baozhen Yang <yangbaozhen5@huaqin.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/88282
Reviewed-by: Eric Lai <ericllai@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
---
 .../brya/variants/baseboard/trulo/Makefile.mk |  1 +
 .../brya/variants/baseboard/trulo/ramstage.c  | 39 +++++++++++++++++++
 2 files changed, 40 insertions(+)
 create mode 100644 src/mainboard/google/brya/variants/baseboard/trulo/ramstage.c

diff --git a/src/mainboard/google/brya/variants/baseboard/trulo/Makefile.mk b/src/mainboard/google/brya/variants/baseboard/trulo/Makefile.mk
index cc62f1ddb7..754843f8cf 100644
--- a/src/mainboard/google/brya/variants/baseboard/trulo/Makefile.mk
+++ b/src/mainboard/google/brya/variants/baseboard/trulo/Makefile.mk
@@ -2,3 +2,4 @@
 
 romstage-$(CONFIG_MAINBOARD_USE_EARLY_LIBGFXINIT) += gma-mainboard.ads
 romstage-y += memory.c
+ramstage-y += ramstage.c
diff --git a/src/mainboard/google/brya/variants/baseboard/trulo/ramstage.c b/src/mainboard/google/brya/variants/baseboard/trulo/ramstage.c
new file mode 100644
index 0000000000..66001bd4be
--- /dev/null
+++ b/src/mainboard/google/brya/variants/baseboard/trulo/ramstage.c
@@ -0,0 +1,39 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+#include <baseboard/gpio.h>
+#include <baseboard/variants.h>
+#include <device/pci_ops.h>
+#include <gpio.h>
+#include <soc/gpio.h>
+#include <soc/ramstage.h>
+#include <soc/pci_devs.h>
+#include <static.h>
+#include <intelblocks/power_limit.h>
+
+struct soc_power_limits_config *variant_get_soc_power_limit_config(void)
+{
+	config_t *config = config_of_soc();
+	size_t i;
+	struct device *sa = pcidev_path_on_root(SA_DEVFN_ROOT);
+	uint16_t sa_pci_id;
+	u8 tdp;
+
+	if (!sa)
+		return NULL;
+
+	sa_pci_id = pci_read_config16(sa, PCI_DEVICE_ID);
+
+	if (sa_pci_id == 0xffff)
+		return NULL;
+
+	tdp = get_cpu_tdp();
+
+	for (i = 0; i < ARRAY_SIZE(cpuid_to_adl); i++) {
+		if (sa_pci_id == cpuid_to_adl[i].cpu_id &&
+				tdp == cpuid_to_adl[i].cpu_tdp) {
+			return &config->power_limits_config[cpuid_to_adl[i].limits];
+		}
+	}
+
+	return NULL;
+}