erebion/coreboot
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions

nb/intel/haswell: Use report_cpu_info() from CPU code

Browse source 
This function prints CPU information, so it makes sense for it to be
part of CPU code. The version in CPU code prints a bit more info but
is otherwise equivalent. After all, this is just logging some info.

Change-Id: I2a9d8a42f78efab6206710fada1d64fa79e8056e
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/91627
Reviewed-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-by: Abdelkader Boudih <coreboot@seuros.com>
Reviewed-by: Alicja Michalska <ahplka19@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Angel Pons 2026-03-09 18:44:07 +01:00 • committed by Matt DeVillier
commit e7cfcec7a7
1 changed files with 4 additions and 44 deletions
Download patch file Download diff file Expand all files Collapse all files

48
src/northbridge/intel/haswell/report_platform.c
View file

@ -1,52 +1,12 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <console/console.h>
#include <arch/cpu.h>
#include <cpu/intel/microcode.h>
#include <string.h>
#include <southbridge/intel/lynxpoint/pch.h>
#include <device/pci_ops.h>
#include <cpu/x86/msr.h>
#include <cpu/intel/haswell/haswell.h>
#include <southbridge/intel/lynxpoint/pch.h>
#include "haswell.h"
static void haswell_report_cpu_info(void)
{
struct cpuid_result cpuidr;
u32 i, index, cpu_id, cpu_feature_flag;
char cpu_string[50], *cpu_name = cpu_string; /* 48 bytes are reported */
int vt, txt, aes;
const char *mode[] = {"NOT ", ""};
index = 0x80000000;
cpuidr = cpuid(index);
if (cpuidr.eax < 0x80000004) {
strcpy(cpu_string, "Platform info not available");
} else {
u32 *p = (u32 *)cpu_string;
for (i = 2; i <= 4; i++) {
cpuidr = cpuid(index + i);
*p++ = cpuidr.eax;
*p++ = cpuidr.ebx;
*p++ = cpuidr.ecx;
*p++ = cpuidr.edx;
}
}
/* Skip leading spaces in CPU name string */
while (cpu_name[0] == ' ')
cpu_name++;
cpu_id = cpu_get_cpuid();
printk(BIOS_DEBUG, "CPU id(%x) ucode:%08x %s\n", cpu_id,
get_current_microcode_rev(), cpu_name);
cpu_feature_flag = cpu_get_feature_flags_ecx();
aes = (cpu_feature_flag & CPUID_AES) ? 1 : 0;
txt = (cpu_feature_flag & CPUID_SMX) ? 1 : 0;
vt = (cpu_feature_flag & CPUID_VMX) ? 1 : 0;
printk(BIOS_DEBUG, "AES %ssupported, TXT %ssupported, VT %ssupported\n",
mode[aes], mode[txt], mode[vt]);
}
/* The PCI id name match comes from Intel document 472178 */
static struct {
u16 dev_id;
@ -96,6 +56,6 @@ static void report_pch_info(void)
void report_platform_info(void)
{
haswell_report_cpu_info();
report_cpu_info();
report_pch_info();
}