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arch/x86: Remove most C_ENV_BOOTBLOCK_SIZE limits

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With top-aligned bootblock this is no longer globally needed.
The default maximum is now a generous 256 KiB with couple
platforms having lower limits of 32 KiB and 64 KiB.

Change-Id: Ib1aee44908c0dcbc17978d3ee53bd05a6200410c
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47600
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
This commit is contained in:
Kyösti Mälkki 2020-05-25 08:52:07 +03:00
commit e76ce871c8
25 changed files with 7 additions and 90 deletions
Download patch file Download diff file Expand all files Collapse all files

4
src/soc/intel/alderlake/Kconfig
View file

@ -215,10 +215,6 @@ config VBOOT
select VBOOT_VBNV_CMOS
select VBOOT_VBNV_CMOS_BACKUP_TO_FLASH
config C_ENV_BOOTBLOCK_SIZE
hex
default 0xC000
config CBFS_SIZE
hex
default 0x200000

4
src/soc/intel/braswell/Kconfig
View file

@ -52,10 +52,6 @@ config DCACHE_BSP_STACK_SIZE
The amount of anticipated stack usage in CAR by bootblock and
other stages.
config C_ENV_BOOTBLOCK_SIZE
hex
default 0x8000
config VBOOT
select VBOOT_MUST_REQUEST_DISPLAY
select VBOOT_STARTS_IN_ROMSTAGE

4
src/soc/intel/cannonlake/Kconfig
View file

@ -270,10 +270,6 @@ config VBOOT
select VBOOT_VBNV_CMOS
select VBOOT_VBNV_CMOS_BACKUP_TO_FLASH
config C_ENV_BOOTBLOCK_SIZE
hex
default 0xC000
config CBFS_SIZE
hex
default 0x200000

4
src/soc/intel/denverton_ns/Kconfig
View file

@ -157,10 +157,6 @@ config CONSOLE_UART_BASE_ADDRESS
hex "MMIO base address for UART"
default 0xd4000000
config C_ENV_BOOTBLOCK_SIZE
hex
default 0x8000
choice
prompt "Cache-as-ram implementation"
default USE_DENVERTON_NS_CAR_NEM_ENHANCED

4
src/soc/intel/elkhartlake/Kconfig
View file

@ -183,10 +183,6 @@ config VBOOT
select VBOOT_VBNV_CMOS
select VBOOT_VBNV_CMOS_BACKUP_TO_FLASH
config C_ENV_BOOTBLOCK_SIZE
hex
default 0xC000
config CBFS_SIZE
hex
default 0x200000

4
src/soc/intel/icelake/Kconfig
View file

@ -177,10 +177,6 @@ config VBOOT
select VBOOT_VBNV_CMOS
select VBOOT_VBNV_CMOS_BACKUP_TO_FLASH
config C_ENV_BOOTBLOCK_SIZE
hex
default 0xC000
config CBFS_SIZE
hex
default 0x200000

4
src/soc/intel/jasperlake/Kconfig
View file

@ -183,10 +183,6 @@ config VBOOT
select VBOOT_VBNV_CMOS
select VBOOT_VBNV_CMOS_BACKUP_TO_FLASH
config C_ENV_BOOTBLOCK_SIZE
hex
default 0xC000
config CBFS_SIZE
hex
default 0x200000

4
src/soc/intel/quark/Kconfig
View file

@ -213,10 +213,6 @@ config DCACHE_BSP_STACK_SIZE
hex
default 0x4000
config C_ENV_BOOTBLOCK_SIZE
hex
default 0x8000
#####
# Test support
#####

4
src/soc/intel/skylake/Kconfig
View file

@ -125,10 +125,6 @@ config DCACHE_BSP_STACK_SIZE
The amount of anticipated stack usage in CAR by bootblock and
other stages.
config C_ENV_BOOTBLOCK_SIZE
hex
default 0xC000
config EXCLUDE_NATIVE_SD_INTERFACE
bool
default n

4
src/soc/intel/tigerlake/Kconfig
View file

@ -211,10 +211,6 @@ config VBOOT
select VBOOT_VBNV_CMOS
select VBOOT_VBNV_CMOS_BACKUP_TO_FLASH
config C_ENV_BOOTBLOCK_SIZE
hex
default 0xC000
config CBFS_SIZE
hex
default 0x200000

4
src/soc/intel/xeon_sp/Kconfig
View file

@ -103,10 +103,6 @@ config MMCONF_BASE_ADDRESS
hex
default 0x80000000
config C_ENV_BOOTBLOCK_SIZE
hex
default 0xC000
config HEAP_SIZE
hex
default 0x80000

4
src/soc/intel/xeon_sp/cpx/Kconfig
View file

@ -68,10 +68,6 @@ config CPU_MICROCODE_CBFS_LEN
hex
default 0x7C00
config C_ENV_BOOTBLOCK_SIZE
hex
default 0xC000
config HEAP_SIZE
hex
default 0x80000

4
src/soc/intel/xeon_sp/skx/Kconfig
View file

@ -51,10 +51,6 @@ config CPU_MICROCODE_CBFS_LEN
hex
default 0x7C00
config C_ENV_BOOTBLOCK_SIZE
hex
default 0xC000
config HEAP_SIZE
hex
default 0x80000