sio/nuvoton/nct{5535,6779}d: Use new common init code
Retire the short-lived special setup to share C code between them, in favour of the common init code provided by CB:82632. Tested on asus/p8z77-m with SeaBIOS 1.17.0. Change-Id: I699fc08d9bfc56dad28eb20042884e979785c070 Signed-off-by: Keith Hui <buurin@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/89744 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Keith Hui
Matt DeVillier
parent
65c4ea0bfb
commit
e72a325c40
6 changed files with 37 additions and 93 deletions
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@ -1,3 +1,3 @@
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# SPDX-License-Identifier: GPL-2.0-or-later
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ramstage-$(CONFIG_SUPERIO_NUVOTON_NCT5535D) += nct5535d.c
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ramstage-$(CONFIG_SUPERIO_NUVOTON_NCT5535D) += superio.c
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@ -2,10 +2,11 @@
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#include <device/device.h>
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#include <device/pnp.h>
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#include <superio/nuvoton/common/nuvoton.h>
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#include "nct5535d.h"
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/* Initialization C code is provided by nct6779d */
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/* Initialization C code is provided by common code */
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static struct pnp_info pnp_dev_info[] = {
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{ NULL, NCT5535D_SP1, PNP_IO0 | PNP_IRQ0, 0x0ff8, },
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@ -18,7 +19,7 @@ static struct pnp_info pnp_dev_info[] = {
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static void enable_dev(struct device *dev)
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{
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pnp_enable_devices(dev, &_nuvoton_nct6779d_ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
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pnp_enable_devices(dev, &nuvoton_common_ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
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}
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struct chip_operations superio_nuvoton_nct5535d_ops = {
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@ -1,4 +1,3 @@
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# SPDX-License-Identifier: GPL-2.0-or-later
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ramstage-$(CONFIG_SUPERIO_NUVOTON_NCT6779D) += superio.c nct6779d.c
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ramstage-$(CONFIG_SUPERIO_NUVOTON_NCT5535D) += superio.c
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ramstage-$(CONFIG_SUPERIO_NUVOTON_NCT6779D) += superio.c
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@ -1,42 +0,0 @@
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/* SPDX-License-Identifier: GPL-2.0-or-later */
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#include <device/device.h>
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#include <device/pnp.h>
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#include "nct6779d.h"
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static struct pnp_info pnp_dev_info[] = {
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{ NULL, NCT6779D_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x0ff8, },
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{ NULL, NCT6779D_SP1, PNP_IO0 | PNP_IRQ0, 0x0ff8, },
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{ NULL, NCT6779D_SP2, PNP_IO0 | PNP_IRQ0, 0x0ff8, },
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{ NULL, NCT6779D_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1,
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0x0fff, 0x0fff, },
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{ NULL, NCT6779D_CIR, PNP_IO0 | PNP_IRQ0, 0x0ff8, },
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{ NULL, NCT6779D_ACPI, PNP_MSC2,},
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{ NULL, NCT6779D_HWM_FPLED, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_MSC0,
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0x0ffe, 0x0ffe, },
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{ NULL, NCT6779D_WDT1},
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{ NULL, NCT6779D_CIRWKUP, PNP_IO0 | PNP_IRQ0, 0x0ff8, },
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{ NULL, NCT6779D_GPIO_PP_OD},
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{ NULL, NCT6779D_PRT80},
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{ NULL, NCT6779D_DSLP},
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{ NULL, NCT6779D_GPIOBASE, PNP_IO0, 0x0ff8, },
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{ NULL, NCT6779D_GPIO0},
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{ NULL, NCT6779D_GPIO1},
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{ NULL, NCT6779D_GPIO2},
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{ NULL, NCT6779D_GPIO3},
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{ NULL, NCT6779D_GPIO4},
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{ NULL, NCT6779D_GPIO5, PNP_MSC4 | PNP_MSC5},
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{ NULL, NCT6779D_GPIO6, PNP_MSC4 | PNP_MSC5},
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{ NULL, NCT6779D_GPIO7},
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{ NULL, NCT6779D_GPIO8},
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};
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static void enable_dev(struct device *dev)
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{
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pnp_enable_devices(dev, &_nuvoton_nct6779d_ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
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}
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struct chip_operations superio_nuvoton_nct6779d_ops = {
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.name = "NUVOTON NCT6779D Super I/O",
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.enable_dev = enable_dev,
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};
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@ -3,8 +3,6 @@
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#ifndef SUPERIO_NUVOTON_NCT6779D_H
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#define SUPERIO_NUVOTON_NCT6779D_H
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#include <device/device.h>
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/* Logical Device Numbers (LDN). */
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#define NCT6779D_PP 0x01 /* Parallel port */
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#define NCT6779D_SP1 0x02 /* Com1 */
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@ -36,6 +34,4 @@
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#define NCT6779D_GPIO7 ((7 << 8) | NCT6779D_GPIO12345678_V)
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#define NCT6779D_GPIO8 ((0 << 8) | NCT6779D_GPIO12345678_V)
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extern struct device_operations _nuvoton_nct6779d_ops;
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#endif /* SUPERIO_NUVOTON_NCT6779D_H */
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@ -2,53 +2,43 @@
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#include <device/device.h>
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#include <device/pnp.h>
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#include <option.h>
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#include <pc80/keyboard.h>
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#include <superio/conf_mode.h>
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#include <superio/nuvoton/common/nuvoton.h>
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#include "nct6779d.h"
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/* C code shared by NCT6779D and NCT5535D */
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static struct pnp_info pnp_dev_info[] = {
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{ NULL, NCT6779D_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x0ff8, },
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{ NULL, NCT6779D_SP1, PNP_IO0 | PNP_IRQ0, 0x0ff8, },
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{ NULL, NCT6779D_SP2, PNP_IO0 | PNP_IRQ0, 0x0ff8, },
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{ NULL, NCT6779D_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1,
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0x0fff, 0x0fff, },
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{ NULL, NCT6779D_CIR, PNP_IO0 | PNP_IRQ0, 0x0ff8, },
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{ NULL, NCT6779D_ACPI, PNP_MSC2,},
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{ NULL, NCT6779D_HWM_FPLED, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_MSC0,
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0x0ffe, 0x0ffe, },
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{ NULL, NCT6779D_WDT1},
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{ NULL, NCT6779D_CIRWKUP, PNP_IO0 | PNP_IRQ0, 0x0ff8, },
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{ NULL, NCT6779D_GPIO_PP_OD},
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{ NULL, NCT6779D_PRT80},
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{ NULL, NCT6779D_DSLP},
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{ NULL, NCT6779D_GPIOBASE, PNP_IO0, 0x0ff8, },
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{ NULL, NCT6779D_GPIO0},
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{ NULL, NCT6779D_GPIO1},
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{ NULL, NCT6779D_GPIO2},
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{ NULL, NCT6779D_GPIO3},
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{ NULL, NCT6779D_GPIO4},
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{ NULL, NCT6779D_GPIO5, PNP_MSC4 | PNP_MSC5},
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{ NULL, NCT6779D_GPIO6, PNP_MSC4 | PNP_MSC5},
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{ NULL, NCT6779D_GPIO7},
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{ NULL, NCT6779D_GPIO8},
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};
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#define MAINBOARD_POWER_OFF 0
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#define MAINBOARD_POWER_ON 1
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#define MAINBOARD_POWER_KEEP 2
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static void nct6779d_init(struct device *dev)
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static void enable_dev(struct device *dev)
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{
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uint8_t byte, power_status;
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if (!dev->enabled)
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return;
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switch (dev->path.pnp.device) {
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/* TODO: Might potentially need code for HWM or FDC etc. */
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case NCT6779D_KBC:
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pc_keyboard_init(NO_AUX_DEVICE);
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break;
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case NCT6779D_ACPI:
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/* Set power state after power fail */
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power_status = get_uint_option("power_on_after_fail",
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CONFIG_MAINBOARD_POWER_FAILURE_STATE);
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pnp_enter_conf_mode(dev);
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pnp_set_logical_device(dev);
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byte = pnp_read_config(dev, 0xe4) & ~0x60;
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if (power_status == MAINBOARD_POWER_ON)
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byte |= (MAINBOARD_POWER_ON << 5);
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else if (power_status == MAINBOARD_POWER_KEEP)
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byte |= (MAINBOARD_POWER_KEEP << 5);
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pnp_write_config(dev, 0xe4, byte);
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pnp_exit_conf_mode(dev);
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printk(BIOS_INFO, "set power %s after power fail\n", power_status ? "on" : "off");
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break;
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}
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pnp_enable_devices(dev, &nuvoton_common_ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
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}
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struct device_operations _nuvoton_nct6779d_ops = {
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.read_resources = pnp_read_resources,
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.set_resources = pnp_set_resources,
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.enable_resources = pnp_enable_resources,
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.enable = pnp_alt_enable,
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.init = nct6779d_init,
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.ops_pnp_mode = &pnp_conf_mode_8787_aa,
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struct chip_operations superio_nuvoton_nct6779d_ops = {
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.name = "NUVOTON NCT6779D Super I/O",
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.enable_dev = enable_dev,
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};
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