From e681a5040d5a331b2c7c484007879587d016900c Mon Sep 17 00:00:00 2001 From: Sheng-Liang Pan Date: Tue, 2 Aug 2016 13:58:24 +0800 Subject: [PATCH] veyron: tiger/fievel: update power LED control with GPIO7_A3 An RC circuit will be added on Tiger/Fievel to solve the S3 blinking. The new GPIO7_A3 behavior is the following: - in S0, GPIO7_A3(low) -> LED on. - in S3, GPIO7_A3(high)-> LED blinking. BUG=chrome-os-partner:55306 TEST=power on fievel with rework RC circuit, LED on in S0. BRANCH=None Change-Id: I52ec6c9608868bb784469edcbfb74e53a30393bf Signed-off-by: Pan Sheng-Liang Reviewed-on: https://chromium-review.googlesource.com/365251 Reviewed-by: Vincent Palatin Reviewed-by: Ren Kuo Trybot-Ready: Vincent Palatin Tested-by: Ren Kuo Commit-Queue: Ren Kuo --- src/mainboard/google/veyron_fievel/bootblock.c | 2 +- src/mainboard/google/veyron_tiger/bootblock.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/src/mainboard/google/veyron_fievel/bootblock.c b/src/mainboard/google/veyron_fievel/bootblock.c index b4c158a2b8..5e15b4f637 100644 --- a/src/mainboard/google/veyron_fievel/bootblock.c +++ b/src/mainboard/google/veyron_fievel/bootblock.c @@ -48,7 +48,7 @@ void bootblock_mainboard_init(void) if (rkclk_was_watchdog_reset()) reboot_from_watchdog(); - gpio_output(GPIO(7, A, 3), 1); /* Power LED */ + gpio_output(GPIO(7, A, 3), 0); /* Power LED */ /* Up VDD_CPU (BUCK1) to 1.4V to support max CPU frequency (1.8GHz). */ setbits_le32(&rk3288_pmu->iomux_i2c0scl, IOMUX_I2C0SCL); diff --git a/src/mainboard/google/veyron_tiger/bootblock.c b/src/mainboard/google/veyron_tiger/bootblock.c index b4c158a2b8..5e15b4f637 100644 --- a/src/mainboard/google/veyron_tiger/bootblock.c +++ b/src/mainboard/google/veyron_tiger/bootblock.c @@ -48,7 +48,7 @@ void bootblock_mainboard_init(void) if (rkclk_was_watchdog_reset()) reboot_from_watchdog(); - gpio_output(GPIO(7, A, 3), 1); /* Power LED */ + gpio_output(GPIO(7, A, 3), 0); /* Power LED */ /* Up VDD_CPU (BUCK1) to 1.4V to support max CPU frequency (1.8GHz). */ setbits_le32(&rk3288_pmu->iomux_i2c0scl, IOMUX_I2C0SCL);