EPIC support for PPC
This commit is contained in:
Greg Watson
parent
b079059d48
commit
e600ebc698
1 changed files with 517 additions and 0 deletions
517
src/northbridge/motorola/mpc107/epic.c
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517
src/northbridge/motorola/mpc107/epic.c
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/**************************************************
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*
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* copyright @ motorola, 1999
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*
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*************************************************/
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#include <pci.h>
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#include <printk.h>
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#include <northbridge/motorola/mpc107/epic.h>
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extern struct pci_ops pci_direct_ppc;
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typedef void (*VOIDFUNCPTR) (void); /* ptr to function returning void */
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struct SrcVecTable SrcVecTable[MAXVEC] = /* Addr/Vector cross-reference tbl */
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{
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{ EPIC_EX_INT0_VEC_REG, "External Direct/Serial Source 0"},
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{ EPIC_EX_INT1_VEC_REG, "External Direct/Serial Source 1"},
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{ EPIC_EX_INT2_VEC_REG, "External Direct/Serial Source 2"},
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{ EPIC_EX_INT3_VEC_REG, "External Direct/Serial Source 3"},
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{ EPIC_EX_INT4_VEC_REG, "External Direct/Serial Source 4"},
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{ EPIC_SR_INT5_VEC_REG, "External Serial Source 5"},
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{ EPIC_SR_INT6_VEC_REG, "External Serial Source 6"},
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{ EPIC_SR_INT7_VEC_REG, "External Serial Source 7"},
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{ EPIC_SR_INT8_VEC_REG, "External Serial Source 8"},
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{ EPIC_SR_INT9_VEC_REG, "External Serial Source 9"},
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{ EPIC_SR_INT10_VEC_REG, "External Serial Source 10"},
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{ EPIC_SR_INT11_VEC_REG, "External Serial Source 11"},
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{ EPIC_SR_INT12_VEC_REG, "External Serial Source 12"},
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{ EPIC_SR_INT13_VEC_REG, "External Serial Source 13"},
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{ EPIC_SR_INT14_VEC_REG, "External Serial Source 14"},
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{ EPIC_SR_INT15_VEC_REG, "External Serial Source 15"},
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{ EPIC_I2C_INT_VEC_REG, "Internal I2C Source"},
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{ EPIC_DMA0_INT_VEC_REG, "Internal DMA0 Source"},
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{ EPIC_DMA1_INT_VEC_REG, "Internal DMA1 Source"},
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{ EPIC_MSG_INT_VEC_REG, "Internal Message Source"},
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};
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VOIDFUNCPTR intVecTbl[MAXVEC]; /* Interrupt vector table */
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/****************************************************************************
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* epicInit - Initialize the EPIC registers
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*
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* This routine resets the Global Configuration Register, thus it:
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* - Disables all interrupts
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* - Sets epic registers to reset values
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* - Sets the value of the Processor Current Task Priority to the
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* highest priority (0xF).
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* epicInit then sets the EPIC operation mode to Mixed Mode (vs. Pass
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* Through or 8259 compatible mode).
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*
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* If IRQType (input) is Direct IRQs:
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* - IRQType is written to the SIE bit of the EPIC Interrupt
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* Configuration register (ICR).
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* - clkRatio is ignored.
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* If IRQType is Serial IRQs:
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* - both IRQType and clkRatio will be written to the ICR register
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*/
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void epicInit
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(
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unsigned int IRQType, /* Direct or Serial */
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unsigned int clkRatio /* Clk Ratio for Serial IRQs */
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)
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{
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ULONG tmp;
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tmp = sysEUMBBARRead(EPIC_GLOBAL_REG);
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tmp |= 0xa0000000; /* Set the Global Conf. register */
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sysEUMBBARWrite(EPIC_GLOBAL_REG, tmp);
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/*
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* Wait for EPIC to reset - CLH
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*/
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while( (sysEUMBBARRead(EPIC_GLOBAL_REG) & 0x80000000) == 1);
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sysEUMBBARWrite(EPIC_GLOBAL_REG, 0x20000000);
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tmp = sysEUMBBARRead(EPIC_INT_CONF_REG); /* Read interrupt conf. reg */
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if (IRQType == EPIC_DIRECT_IRQ) /* direct mode */
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sysEUMBBARWrite(EPIC_INT_CONF_REG, tmp & 0xf7ffffff);
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else /* Serial mode */
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{
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tmp = (clkRatio << 28) | 0x08000000; /* Set clock ratio */
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sysEUMBBARWrite(EPIC_INT_CONF_REG, tmp);
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}
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while (epicIntAck() != 0xff) /* Clear all pending interrupts */
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epicEOI();
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}
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/****************************************************************************
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* epicIntEnable - Enable an interrupt source
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*
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* This routine clears the mask bit of an external, an internal or
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* a Timer register to enable the interrupt.
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*
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* RETURNS: None
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*/
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void epicIntEnable(int intVec)
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{
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ULONG tmp;
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ULONG srAddr;
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srAddr = SrcVecTable[intVec].srcAddr; /* Retrieve src Vec/Prio register */
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tmp = sysEUMBBARRead(srAddr);
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tmp &= ~EPIC_VEC_PRI_MASK; /* Clear the mask bit */
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tmp |= (EPIC_VEC_PRI_DFLT_PRI << 16); /* Set priority to Default - CLH */
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tmp |= intVec; /* Set Vector number */
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sysEUMBBARWrite(srAddr, tmp);
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return;
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}
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/****************************************************************************
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* epicIntDisable - Disable an interrupt source
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*
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* This routine sets the mask bit of an external, an internal or
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* a Timer register to disable the interrupt.
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*
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* RETURNS: OK or ERROR
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*
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*/
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void epicIntDisable
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(
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int intVec /* Interrupt vector number */
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)
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{
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ULONG tmp, srAddr;
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srAddr = SrcVecTable[intVec].srcAddr;
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tmp = sysEUMBBARRead(srAddr);
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tmp |= 0x80000000; /* Set the mask bit */
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sysEUMBBARWrite(srAddr, tmp);
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return;
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}
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/****************************************************************************
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* epicIntSourceConfig - Set properties of an interrupt source
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*
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* This function sets interrupt properites (Polarity, Sense, Interrupt
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* Prority, and Interrupt Vector) of an Interrupt Source. The properties
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* can be set when the current source is not in-request or in-service,
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* which is determined by the Activity bit. This routine return ERROR
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* if the the Activity bit is 1 (in-request or in-service).
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*
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* This function assumes that the Source Vector/Priority register (input)
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* is a valid address.
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*
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* RETURNS: OK or ERROR
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*/
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int epicIntSourceConfig
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(
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int Vect, /* interrupt source vector number */
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int Polarity, /* interrupt source polarity */
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int Sense, /* interrupt source Sense */
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int Prio /* interrupt source priority */
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)
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{
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ULONG tmp, newVal;
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ULONG actBit, srAddr;
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srAddr = SrcVecTable[Vect].srcAddr;
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tmp = sysEUMBBARRead(srAddr);
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actBit = (tmp & 40000000) >> 30; /* retrieve activity bit - bit 30 */
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if (actBit == 1)
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return ERROR;
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tmp &= 0xff30ff00; /* Erase previously set P,S,Prio,Vector bits */
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newVal = (Polarity << 23) | (Sense << 22) | (Prio << 16) | Vect;
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sysEUMBBARWrite(srAddr, tmp | newVal );
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return (OK);
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}
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/****************************************************************************
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* epicIntAck - acknowledge an interrupt
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*
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* This function reads the Interrupt acknowldge register and return
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* the vector number of the highest pending interrupt.
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*
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* RETURNS: Interrupt Vector number.
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*/
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unsigned int epicIntAck(void)
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{
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return(sysEUMBBARRead( EPIC_PROC_INT_ACK_REG ));
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}
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/****************************************************************************
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* epicEOI - signal an end of interrupt
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*
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* This function writes 0x0 to the EOI register to signal end of interrupt.
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* It is usually called after an interrupt routine is served.
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*
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* RETURNS: None
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*/
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void epicEOI(void)
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{
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sysEUMBBARWrite(EPIC_PROC_EOI_REG, 0x0);
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}
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/****************************************************************************
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* epicCurTaskPrioSet - sets the priority of the Processor Current Task
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*
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* This function should be called after epicInit() to lower the priority
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* of the processor current task.
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*
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* RETURNS: OK or ERROR
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*/
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int epicCurTaskPrioSet
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(
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int prioNum /* New priority value */
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)
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{
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if ( (prioNum < 0) || (prioNum > 0xF))
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return ERROR;
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sysEUMBBARWrite(EPIC_PROC_CTASK_PRI_REG, prioNum);
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return OK;
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}
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/************************************************************************
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* function: epicIntTaskGet
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*
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* description: Get value of processor current interrupt task priority register
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*
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* note:
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***********************************************************************/
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unsigned char epicIntTaskGet()
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{
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/* get the interrupt task priority register */
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ULONG reg;
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unsigned char rec;
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reg = sysEUMBBARRead( EPIC_PROC_CTASK_PRI_REG );
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rec = ( reg & 0x0F );
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return rec;
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}
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/**************************************************************
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* function: epicISR
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*
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* description: EPIC service routine called by the core exception
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* at 0x500
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*
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* note:
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**************************************************************/
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unsigned int epicISR(void)
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{
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return 0;
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}
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/************************************************************
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* function: epicModeGet
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*
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* description: query EPIC mode, return 0 if pass through mode
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* return 1 if mixed mode
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*
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* note:
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*************************************************************/
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unsigned int epicModeGet(void)
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{
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ULONG val;
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val = sysEUMBBARRead( EPIC_GLOBAL_REG );
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return (( val & 0x20000000 ) >> 29);
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}
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/*********************************************
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* function: epicConfigGet
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*
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* description: Get the EPIC interrupt Configuration
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* return 0 if not error, otherwise return 1
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*
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* note:
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********************************************/
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void epicConfigGet( unsigned int *clkRatio, unsigned int *serEnable)
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{
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ULONG val;
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val = sysEUMBBARRead( EPIC_INT_CONF_REG );
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*clkRatio = ( val & 0x70000000 ) >> 28;
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*serEnable = ( val & 0x8000000 ) >> 27;
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}
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/*******************************************************************
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* sysEUMBBARRead - Read a 32-bit EUMBBAR register
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*
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* This routine reads the content of a register in the Embedded
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* Utilities Memory Block, and swaps to big endian before returning
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* the value.
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*
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* RETURNS: The content of the specified EUMBBAR register.
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*/
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ULONG sysEUMBBARRead
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(
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ULONG regNum
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)
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{
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u32 temp;
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pci_direct_ppc.read_dword(0, 0, regNum, &temp);
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return ( temp );
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}
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/*******************************************************************
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* sysEUMBBARWrite - Write a 32-bit EUMBBAR register
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*
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* This routine swaps the value to little endian then writes it to
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* a register in the Embedded Utilities Memory Block address space.
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*
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* RETURNS: N/A
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*/
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void sysEUMBBARWrite
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(
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ULONG regNum, /* EUMBBAR register address */
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u32 regVal /* Value to be written */
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)
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{
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pci_direct_ppc.read_dword(0, 0, regNum, ®Val);
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return ;
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}
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/********************************************************
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* function: epicVendorId
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*
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* description: return the EPIC Vendor Identification
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* register:
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*
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* siliccon version, device id, and vendor id
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*
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* note:
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********************************************************/
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void epicVendorId
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(
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unsigned int *step,
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unsigned int *devId,
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unsigned int *venId
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)
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{
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ULONG val;
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val = sysEUMBBARRead( EPIC_VENDOR_ID_REG );
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*step = ( val & 0x00FF0000 ) >> 16;
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*devId = ( val & 0x0000FF00 ) >> 8;
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*venId = ( val & 0x000000FF );
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}
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/**************************************************
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* function: epicFeatures
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*
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* description: return the number of IRQ supported,
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* number of CPU, and the version of the
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* OpenEPIC
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*
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* note:
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*************************************************/
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void epicFeatures
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(
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unsigned int *noIRQs,
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unsigned int *noCPUs,
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unsigned int *verId
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)
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{
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ULONG val;
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val = sysEUMBBARRead( EPIC_FEATURES_REG );
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*noIRQs = ( val & 0x07FF0000 ) >> 16;
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*noCPUs = ( val & 0x00001F00 ) >> 8;
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*verId = ( val & 0x000000FF );
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}
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/*********************************************************
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* function: epciTmFrequncySet
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*
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* description: Set the timer frequency reporting register
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********************************************************/
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void epicTmFrequencySet( unsigned int frq )
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{
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sysEUMBBARWrite(EPIC_TM_FREQ_REG, frq);
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}
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/*******************************************************
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* function: epicTmFrequncyGet
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*
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* description: Get the current value of the Timer Frequency
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* Reporting register
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*
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******************************************************/
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unsigned int epicTmFrequencyGet(void)
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{
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return( sysEUMBBARRead(EPIC_TM_FREQ_REG)) ;
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}
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/****************************************************
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* function: epicTmBaseSet
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*
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* description: Set the #n global timer base count register
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* return 0 if no error, otherwise return 1.
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*
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* note:
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****************************************************/
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unsigned int epicTmBaseSet
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(
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ULONG srcAddr, /* Address of the Timer Base register */
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unsigned int cnt, /* Base count */
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unsigned int inhibit /* 1 - count inhibit */
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)
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{
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unsigned int val = 0x80000000;
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/* First inhibit counting the timer */
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sysEUMBBARWrite(srcAddr, val) ;
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/* set the new value */
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val = (cnt & 0x7fffffff) | ((inhibit & 0x1) << 31);
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sysEUMBBARWrite(srcAddr, val) ;
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return 0;
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}
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/***********************************************************************
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* function: epicTmBaseGet
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*
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* description: Get the current value of the global timer base count register
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* return 0 if no error, otherwise return 1.
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*
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* note:
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***********************************************************************/
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unsigned int epicTmBaseGet( ULONG srcAddr, unsigned int *val )
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{
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*val = sysEUMBBARRead( srcAddr );
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*val = *val & 0x7fffffff;
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return 0;
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}
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/***********************************************************
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* function: epicTmCountGet
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*
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* description: Get the value of a given global timer
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* current count register
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* return 0 if no error, otherwise return 1
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* note:
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**********************************************************/
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unsigned int epicTmCountGet( ULONG srcAddr, unsigned int *val )
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{
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*val = sysEUMBBARRead( srcAddr );
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*val = *val & 0x7fffffff;
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return 0;
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}
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/***********************************************************
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* function: epicTmInhibit
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*
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* description: Stop counting of a given global timer
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* return 0 if no error, otherwise return 1
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*
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* note:
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***********************************************************/
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unsigned int epicTmInhibit( unsigned int srcAddr )
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{
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ULONG val;
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val = sysEUMBBARRead( srcAddr );
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val |= 0x80000000;
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sysEUMBBARWrite( srcAddr, val );
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return 0;
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}
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/******************************************************************
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* function: epicTmEnable
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*
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* description: Enable counting of a given global timer
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* return 0 if no error, otherwise return 1
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*
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* note:
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*****************************************************************/
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unsigned int epicTmEnable( ULONG srcAddr )
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{
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ULONG val;
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val = sysEUMBBARRead( srcAddr );
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val &= 0x7fffffff;
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sysEUMBBARWrite( srcAddr, val );
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return 0;
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}
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void epicSourcePrint(int Vect)
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{
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ULONG srcVal;
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srcVal = sysEUMBBARRead(SrcVecTable[Vect].srcAddr);
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printk_info("%s\n", SrcVecTable[Vect].srcName);
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printk_info("Address = 0x%lx\n", SrcVecTable[Vect].srcAddr);
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printk_info("Vector = %ld\n", (srcVal & 0x000000FF) );
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printk_info("Mask = %ld\n", srcVal >> 31);
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printk_info("Activitiy = %ld\n", (srcVal & 40000000) >> 30);
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printk_info("Polarity = %ld\n", (srcVal & 0x00800000) >> 23);
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printk_info("Sense = %ld\n", (srcVal & 0x00400000) >> 22);
|
||||
printk_info("Priority = %ld\n", (srcVal & 0x000F0000) >> 16);
|
||||
}
|
||||
Loading…
Add table
Add a link
Reference in a new issue