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mb/trulo/var/pujjoquince: Add Fingerprint function

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1. This change is based on the fact that the code for the pujjolo
and pujjoquince projects is shared.
2. Add fingerprint function and use proto board to verify the
functionality.

Schematic version: 500E_S3A0_TWL_MB_FVT_20250527

BUG=b:395763555
BRANCH=none
TEST=Use ectool --name=cros_fp version will return fingerprint
version information and check the functionality works.

Change-Id: I557c7b6a10b137604ff4abae81c7a231c48b099d
Signed-off-by: Luca Lai <luca.lai@lcfc.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/88186
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Luca Lai 2025-06-25 10:29:25 +08:00 • committed by Subrata Banik
commit e5e79de8cc
2 changed files with 9 additions and 3 deletions
Download patch file Download diff file Expand all files Collapse all files

4
src/mainboard/google/brya/variants/pujjolo/gpio.c
View file

@ -118,8 +118,8 @@ static const struct pad_config override_gpio_table[] = {
PAD_CFG_GPO_LOCK(GPP_D0, 0, LOCK_CONFIG), PAD_CFG_GPO_LOCK(GPP_D0, 0, LOCK_CONFIG),
/* D1 : ISH_GP1 ==> SOC_GSEN2_INT# */ /* D1 : ISH_GP1 ==> SOC_GSEN2_INT# */
PAD_CFG_NF(GPP_D1, NONE, DEEP, NF1), PAD_CFG_NF(GPP_D1, NONE, DEEP, NF1),
/* D2 : NC */ /* D2 : NC => EN_FP_PWR */
PAD_NC_LOCK(GPP_D2, NONE, LOCK_CONFIG), PAD_CFG_GPO_LOCK(GPP_D2, 1, LOCK_CONFIG),
/* D3 : ISH_GP3 ==> WCAM_RST_L */ /* D3 : ISH_GP3 ==> WCAM_RST_L */
PAD_CFG_GPO_LOCK(GPP_D3, 0, LOCK_CONFIG), PAD_CFG_GPO_LOCK(GPP_D3, 0, LOCK_CONFIG),
/* D4 : IMGCLKOUT0 ==> BT_DISABLE_L */ /* D4 : IMGCLKOUT0 ==> BT_DISABLE_L */

8
src/mainboard/google/brya/variants/pujjolo/overridetree.cb
View file

@ -8,6 +8,10 @@ fw_config
option WIFI_SAR_TABLE_AX211 0 option WIFI_SAR_TABLE_AX211 0
option WIFI_SAR_TABLE_AX203 1 option WIFI_SAR_TABLE_AX203 1
end end
field FP 24
option FP_ABSENT 0
option FP_PRESENT 1
end
field SD_CARD 25 field SD_CARD 25
option SD_ABSENT 0 option SD_ABSENT 0
option SD_PRESENT 1 option SD_PRESENT 1
@ -630,7 +634,9 @@ chip soc/intel/alderlake
register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_E7)" register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_E7)"
register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D2)" register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D2)"
register "enable_delay_ms" = "3" register "enable_delay_ms" = "3"
device spi 0 on end device spi 0 on
probe FP FP_PRESENT
end
end # FPMCU end # FPMCU
end end
device ref cnvi_wifi on device ref cnvi_wifi on