From e4cc292b03b7a404aac41773fc611f7b4f94f5d9 Mon Sep 17 00:00:00 2001
From: Aaron Durbin <adurbin@chromium.org>
Date: Fri, 21 Jun 2013 13:37:23 -0500
Subject: [PATCH] lynxpoint: provide gpio_is_native()

There's a need to determine if a specific gpio pin is
is set up to be a native function or not. Implement this.

BUG=chrome-os-partner:20262
BRANCH=None
TEST=Built. Determined LP version worked correctly based off of another
     patch.

Change-Id: I91d57a549e0f4fddc0b1849e5f74320fc839642c
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/59589
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
---
 src/southbridge/intel/lynxpoint/gpio.c    | 21 ++++++++++++++++++++-
 src/southbridge/intel/lynxpoint/lp_gpio.c |  7 +++++++
 src/southbridge/intel/lynxpoint/pch.h     |  2 ++
 3 files changed, 29 insertions(+), 1 deletion(-)

diff --git a/src/southbridge/intel/lynxpoint/gpio.c b/src/southbridge/intel/lynxpoint/gpio.c
index 34157a10e8..e91d3a125a 100644
--- a/src/southbridge/intel/lynxpoint/gpio.c
+++ b/src/southbridge/intel/lynxpoint/gpio.c
@@ -123,8 +123,27 @@ void set_gpio(int gpio_num, int value)
 	index = gpio_num / 32;
 	bit = gpio_num % 32;
 
-	config = inl(gpio_basde + gpio_reg_offsets[index]);
+	config = inl(gpio_base + gpio_reg_offsets[index]);
 	config &= ~(1 << bit);
 	config |= value << bit;
 	outl(config, gpio_base + gpio_reg_offsets[index]);
 }
+
+int gpio_is_native(int gpio_num)
+{
+	static const int gpio_reg_offsets[] = {
+		GPIO_USE_SEL, GPIO_USE_SEL2, GPIO_USE_SEL3
+	};
+	u16 gpio_base = get_gpio_base();
+	int index, bit;
+	u32 config;
+
+	if (gpio_num > MAX_GPIO_NUMBER)
+		return 0; /* Just ignore wrong gpio numbers. */
+
+	index = gpio_num / 32;
+	bit = gpio_num % 32;
+
+	config = inl(gpio_base + gpio_reg_offsets[index]);
+	return !(config & (1 << bit));
+}
diff --git a/src/southbridge/intel/lynxpoint/lp_gpio.c b/src/southbridge/intel/lynxpoint/lp_gpio.c
index 7d1a28d73c..cb052b22c3 100644
--- a/src/southbridge/intel/lynxpoint/lp_gpio.c
+++ b/src/southbridge/intel/lynxpoint/lp_gpio.c
@@ -159,3 +159,10 @@ void set_gpio(int gpio_num, int value)
 	conf0 |= value << GPO_LEVEL_SHIFT;
 	outl(conf0, gpio_base + GPIO_CONFIG0(gpio_num));
 }
+
+int gpio_is_native(int gpio_num)
+{
+	u16 gpio_base = get_gpio_base();
+
+	return !(inl(gpio_base + GPIO_CONFIG0(gpio_num)) & 1);
+}
diff --git a/src/southbridge/intel/lynxpoint/pch.h b/src/southbridge/intel/lynxpoint/pch.h
index cc90f428b2..d093b1fe77 100644
--- a/src/southbridge/intel/lynxpoint/pch.h
+++ b/src/southbridge/intel/lynxpoint/pch.h
@@ -201,6 +201,8 @@ unsigned get_gpios(const int *gpio_num_array);
  * set GPIO pin value
  */
 void set_gpio(int gpio_num, int value);
+/* Return non-zero if gpio is set to native function. 0 otherwise. */
+int gpio_is_native(int gpio_num);
 #endif
 
 #define MAINBOARD_POWER_OFF	0