soc/intel/pantherlake: Rearm and clear only for valid crashlog in PMC
Rearm and clear functions are called only if a valid crashlog is
present and extracted. If there is no valid crashlog, rearming will
lead to incorrect notification and skipping of the next crashlog event
BUG=b: None
TEST= PMC discovery buffer - rearmed status bit (trig_armed_sts)
MMIO read of Bit position 25 is rearmed status bit
MMIO read of desc_table_addr = (bar_address + offset)
desc_table_addr = 0x9c198000 + 0x1d00 = 0x9c199d00
:1 for cold boot and
:0 for warm boot after manual crash
Change-Id: I42da487abd383567d7945835b738557e2e3fa714
Signed-off-by: Sowmya Aralguppe <sowmya.aralguppe@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/88519
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Bora Guvendik <bora.guvendik@intel.com>
Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com>
This commit is contained in:
parent
510686add4
commit
e38a216368
1 changed files with 10 additions and 5 deletions
|
|
@ -161,11 +161,16 @@ void cl_get_pmc_sram_data(cl_node_t *head)
|
|||
update_new_pmc_crashlog_size(&pmc_crashLog_size);
|
||||
|
||||
pmc_send_re_arm_after_reset:
|
||||
/* When bit 7 of discov cmd resp is set -> bit 2 of size field */
|
||||
cl_pmc_re_arm_after_reset();
|
||||
|
||||
/* Clear the SSRAM region after copying the error log */
|
||||
cl_pmc_clear();
|
||||
/* Re-arm and clear only if crashlog is present and valid*/
|
||||
if (!pmc_crashLog_size) {
|
||||
printk(BIOS_DEBUG, "No valid crashlog data found in PMC SRAM\n");
|
||||
return;
|
||||
} else {
|
||||
/* When bit 7 of discov cmd resp is set -> bit 2 of size field */
|
||||
cl_pmc_re_arm_after_reset();
|
||||
/* Clear the SSRAM region after copying the error log */
|
||||
cl_pmc_clear();
|
||||
}
|
||||
}
|
||||
|
||||
bool pmc_cl_discovery(void)
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue