cpu/x86: Separate save_state struct headers

Any platform should need just one of these.

Change-Id: Ia0ff8eff152cbd3d82e8b372ec662d3737078d35
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34820
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/soc/amd/picasso/cpu.c

@@ -20,6 +20,7 @@
 #include <cpu/x86/msr.h>
 #include <cpu/x86/smm.h>
 #include <cpu/amd/msr.h>
+#include <cpu/amd/amd64_save_state.h>
 #include <cpu/x86/lapic.h>
 #include <device/device.h>
 #include <device/pci_ops.h>

src/soc/amd/picasso/smihandler.c

@@ -19,6 +19,7 @@
 #include <console/console.h>
 #include <cpu/x86/smm.h>
 #include <cpu/x86/cache.h>
+#include <cpu/amd/amd64_save_state.h>
 #include <arch/acpi.h>
 #include <arch/hlt.h>
 #include <device/pci_def.h>

src/soc/amd/stoneyridge/cpu.c

@@ -20,6 +20,7 @@
 #include <cpu/x86/msr.h>
 #include <cpu/x86/smm.h>
 #include <cpu/amd/msr.h>
+#include <cpu/amd/amd64_save_state.h>
 #include <cpu/x86/lapic.h>
 #include <device/device.h>
 #include <device/pci_ops.h>

src/soc/amd/stoneyridge/smihandler.c

@@ -19,6 +19,7 @@
 #include <console/console.h>
 #include <cpu/x86/smm.h>
 #include <cpu/x86/cache.h>
+#include <cpu/amd/amd64_save_state.h>
 #include <arch/acpi.h>
 #include <arch/hlt.h>
 #include <device/pci_def.h>

src/soc/intel/apollolake/cpu.c

@@ -30,6 +30,7 @@
 #include <cpu/x86/msr.h>
 #include <cpu/x86/mtrr.h>
 #include <cpu/x86/smm.h>
+#include <cpu/intel/em64t100_save_state.h>
 #include <device/device.h>
 #include <device/pci.h>
 #include <fsp/api.h>

src/soc/intel/apollolake/smihandler.c

@@ -15,6 +15,7 @@
  */
 
 #include <cpu/x86/smm.h>
+#include <cpu/intel/em64t100_save_state.h>
 #include <intelblocks/smihandler.h>
 #include <soc/gpio.h>
 #include <soc/iomap.h>

src/soc/intel/baytrail/cpu.c

@@ -25,6 +25,7 @@
 #include <cpu/x86/msr.h>
 #include <cpu/x86/mtrr.h>
 #include <cpu/x86/smm.h>
+#include <cpu/intel/em64t100_save_state.h>
 #include <reg_script.h>
 
 #include <soc/iosf.h>

src/soc/intel/baytrail/smihandler.c

@@ -20,6 +20,7 @@
 #include <console/console.h>
 #include <cpu/x86/cache.h>
 #include <cpu/x86/smm.h>
+#include <cpu/intel/em64t100_save_state.h>
 #include <device/pci_def.h>
 #include <elog.h>
 #include <halt.h>

src/soc/intel/braswell/cpu.c

@@ -26,6 +26,7 @@
 #include <cpu/x86/msr.h>
 #include <cpu/x86/mtrr.h>
 #include <cpu/x86/smm.h>
+#include <cpu/intel/em64t100_save_state.h>
 #include <reg_script.h>
 #include <soc/iosf.h>
 #include <soc/msr.h>

src/soc/intel/braswell/smihandler.c

@@ -21,6 +21,7 @@
 #include <console/console.h>
 #include <cpu/x86/cache.h>
 #include <cpu/x86/smm.h>
+#include <cpu/intel/em64t100_save_state.h>
 #include <device/pci_def.h>
 #include <elog.h>
 #include <soc/nvs.h>

src/soc/intel/broadwell/smihandler.c

@@ -23,6 +23,7 @@
 #include <cpu/x86/cache.h>
 #include <device/pci_def.h>
 #include <cpu/x86/smm.h>
+#include <cpu/intel/em64t101_save_state.h>
 #include <spi-generic.h>
 #include <elog.h>
 #include <halt.h>

src/soc/intel/broadwell/smmrelocate.c

@@ -24,6 +24,7 @@
 #include <cpu/x86/msr.h>
 #include <cpu/x86/mtrr.h>
 #include <cpu/x86/smm.h>
+#include <cpu/intel/em64t101_save_state.h>
 #include <console/console.h>
 #include <soc/cpu.h>
 #include <soc/msr.h>

src/soc/intel/cannonlake/smmrelocate.c

@@ -26,6 +26,7 @@
 #include <cpu/x86/msr.h>
 #include <cpu/x86/mtrr.h>
 #include <cpu/x86/smm.h>
+#include <cpu/intel/em64t101_save_state.h>
 #include <console/console.h>
 #include <intelblocks/smm.h>
 #include <soc/cpu.h>

src/soc/intel/common/block/smm/smihandler.c

@@ -20,6 +20,8 @@
 #include <console/console.h>
 #include <cpu/x86/cache.h>
 #include <cpu/x86/smm.h>
+#include <cpu/intel/em64t100_save_state.h>
+#include <cpu/intel/em64t101_save_state.h>
 #include <delay.h>
 #include <device/pci_def.h>
 #include <elog.h>

src/soc/intel/denverton_ns/cpu.c

@@ -22,6 +22,7 @@
 #include <cpu/x86/msr.h>
 #include <cpu/x86/mtrr.h>
 #include <cpu/x86/smm.h>
+#include <cpu/intel/em64t100_save_state.h>
 #include <cpu/intel/turbo.h>
 #include <device/device.h>
 #include <device/pci.h>

src/soc/intel/denverton_ns/smihandler.c

@@ -23,6 +23,7 @@
 #include <console/console.h>
 #include <cpu/x86/cache.h>
 #include <cpu/x86/smm.h>
+#include <cpu/intel/em64t100_save_state.h>
 #include <device/pci_def.h>
 #include <elog.h>
 #include <intelblocks/fast_spi.h>

src/soc/intel/fsp_baytrail/cpu.c

@@ -25,6 +25,7 @@
 #include <cpu/x86/msr.h>
 #include <cpu/x86/mtrr.h>
 #include <cpu/x86/smm.h>
+#include <cpu/intel/em64t100_save_state.h>
 #include <reg_script.h>
 
 #include <soc/msr.h>

src/soc/intel/fsp_baytrail/smihandler.c

@@ -20,6 +20,7 @@
 #include <console/console.h>
 #include <cpu/x86/cache.h>
 #include <cpu/x86/smm.h>
+#include <cpu/intel/em64t100_save_state.h>
 #include <device/pci_def.h>
 #include <elog.h>
 #include <halt.h>

src/soc/intel/fsp_broadwell_de/smmrelocate.c

@@ -23,6 +23,7 @@
 #include <cpu/x86/mp.h>
 #include <cpu/x86/mtrr.h>
 #include <cpu/x86/smm.h>
+#include <cpu/intel/em64t101_save_state.h>
 #include <console/console.h>
 #include <device/pci_ops.h>
 #include <soc/lpc.h>

src/soc/intel/icelake/smmrelocate.c

@@ -25,6 +25,7 @@
 #include <cpu/x86/msr.h>
 #include <cpu/x86/mtrr.h>
 #include <cpu/x86/smm.h>
+#include <cpu/intel/em64t101_save_state.h>
 #include <console/console.h>
 #include <intelblocks/smm.h>
 #include <soc/cpu.h>

src/soc/intel/skylake/smmrelocate.c

@@ -25,6 +25,7 @@
 #include <cpu/x86/msr.h>
 #include <cpu/x86/mtrr.h>
 #include <cpu/x86/smm.h>
+#include <cpu/intel/em64t101_save_state.h>
 #include <console/console.h>
 #include <intelblocks/smm.h>
 #include <soc/cpu.h>