From e2aeb2f4e7f3959d5f5336f42a29909134a7ddb7 Mon Sep 17 00:00:00 2001 From: Vadim Bendebury Date: Tue, 13 May 2014 17:17:22 -0700 Subject: [PATCH] storm: initialize dynamic cbmem properly Dynamic cbmem support has been enabled on storm, but the proper initialization at romstage is missing. Proper DRAM base address definition is also necessary so that CBMEM is placed in the correct address range (presently at the top of DRAM). BUG=chrome-os-partner:27784 TEST=build boot coreboot on ap148, observe the following in the console output: Wrote coreboot table at: 5fffd000, 0xe8 bytes, checksum 44a5 coreboot table: 256 bytes. CBMEM ROOT 0. 5ffff000 00001000 COREBOOT 1. 5fffd000 00002000 Change-Id: I74ccd252ddfdeaa0a5bcc929be72be174f310730 Signed-off-by: Vadim Bendebury Reviewed-on: https://chromium-review.googlesource.com/199674 Reviewed-by: Aaron Durbin --- src/mainboard/google/storm/romstage.c | 2 ++ src/soc/qualcomm/ipq806x/Kconfig | 15 +++++++++------ src/soc/qualcomm/ipq806x/Makefile.inc | 1 + 3 files changed, 12 insertions(+), 6 deletions(-) diff --git a/src/mainboard/google/storm/romstage.c b/src/mainboard/google/storm/romstage.c index d9a15bfa08..a7b8acd762 100644 --- a/src/mainboard/google/storm/romstage.c +++ b/src/mainboard/google/storm/romstage.c @@ -19,12 +19,14 @@ #include #include +#include #include void main(void) { void *entry; + cbmem_initialize_empty(); console_init(); entry = cbfs_load_stage(CBFS_DEFAULT_MEDIA, "fallback/ramstage"); diff --git a/src/soc/qualcomm/ipq806x/Kconfig b/src/soc/qualcomm/ipq806x/Kconfig index c1db4f89af..770ad16655 100644 --- a/src/soc/qualcomm/ipq806x/Kconfig +++ b/src/soc/qualcomm/ipq806x/Kconfig @@ -51,21 +51,24 @@ config RAMSTAGE_BASE hex default 0x4060c000 +config SYS_SDRAM_BASE + hex + default 0x40000000 config STACK_TOP - hex - default 0x40600000 + hex + default 0x40600000 config STACK_BOTTOM hex default 0x405fc000 config CBFS_CACHE_ADDRESS - hex "memory address to put CBFS cache data" - default 0x405e6000 + hex "memory address to put CBFS cache data" + default 0x405e6000 config CBFS_CACHE_SIZE - hex "size of CBFS cache data" - default 0x00016000 + hex "size of CBFS cache data" + default 0x00016000 endif diff --git a/src/soc/qualcomm/ipq806x/Makefile.inc b/src/soc/qualcomm/ipq806x/Makefile.inc index d571cb40c0..7296d26ce0 100644 --- a/src/soc/qualcomm/ipq806x/Makefile.inc +++ b/src/soc/qualcomm/ipq806x/Makefile.inc @@ -29,6 +29,7 @@ romstage-y += gpio.c romstage-$(CONFIG_SPI_FLASH) += spi.c romstage-y += timer.c romstage-$(CONFIG_CONSOLE_SERIAL_IPQ806X) += uart.c +romstage-$(CONFIG_DYNAMIC_CBMEM) += cbmem.c ramstage-y += cbmem.c ramstage-y += clock.c