diff --git a/src/mainboard/google/storm/romstage.c b/src/mainboard/google/storm/romstage.c
index d9a15bfa08..a7b8acd762 100644
--- a/src/mainboard/google/storm/romstage.c
+++ b/src/mainboard/google/storm/romstage.c
@@ -19,12 +19,14 @@
 
 #include <arch/stages.h>
 #include <cbfs.h>
+#include <cbmem.h>
 #include <console/console.h>
 
 void main(void)
 {
 	void *entry;
 
+	cbmem_initialize_empty();
 	console_init();
 
 	entry = cbfs_load_stage(CBFS_DEFAULT_MEDIA, "fallback/ramstage");
diff --git a/src/soc/qualcomm/ipq806x/Kconfig b/src/soc/qualcomm/ipq806x/Kconfig
index c1db4f89af..770ad16655 100644
--- a/src/soc/qualcomm/ipq806x/Kconfig
+++ b/src/soc/qualcomm/ipq806x/Kconfig
@@ -51,21 +51,24 @@ config RAMSTAGE_BASE
 	hex
 	default 0x4060c000
 
+config SYS_SDRAM_BASE
+	hex
+	default 0x40000000
 
 config STACK_TOP
-        hex
-        default 0x40600000
+	hex
+	default 0x40600000
 
 config STACK_BOTTOM
        hex
        default 0x405fc000
 
 config CBFS_CACHE_ADDRESS
-        hex "memory address to put CBFS cache data"
-        default 0x405e6000
+	hex "memory address to put CBFS cache data"
+	default 0x405e6000
 
 config CBFS_CACHE_SIZE
-        hex "size of CBFS cache data"
-        default 0x00016000
+	hex "size of CBFS cache data"
+	default 0x00016000
 
 endif
diff --git a/src/soc/qualcomm/ipq806x/Makefile.inc b/src/soc/qualcomm/ipq806x/Makefile.inc
index d571cb40c0..7296d26ce0 100644
--- a/src/soc/qualcomm/ipq806x/Makefile.inc
+++ b/src/soc/qualcomm/ipq806x/Makefile.inc
@@ -29,6 +29,7 @@ romstage-y += gpio.c
 romstage-$(CONFIG_SPI_FLASH) += spi.c
 romstage-y += timer.c
 romstage-$(CONFIG_CONSOLE_SERIAL_IPQ806X) += uart.c
+romstage-$(CONFIG_DYNAMIC_CBMEM) += cbmem.c
 
 ramstage-y += cbmem.c
 ramstage-y += clock.c