diff --git a/southbridge/amd/cs5536/cs5536.c b/southbridge/amd/cs5536/cs5536.c
index 8adc2cd1eb..b85794d3c6 100644
--- a/southbridge/amd/cs5536/cs5536.c
+++ b/southbridge/amd/cs5536/cs5536.c
@@ -395,18 +395,19 @@ static void uarts_init(struct southbridge_amd_cs5536_dts_config *sb)
 	}
 }
 
-#define HCCPARAMS		0x08
-#define IPREG04			0xA0
+/* the /sizeof(u32) is to convert byte offsets into u32 offsets */
+#define HCCPARAMS		(0x08/sizeof(u32))
+#define IPREG04			(0xA0/sizeof(u32))
 #define USB_HCCPW_SET		(1 << 1)
 #define UOCCAP			0x00
 #define APU_SET			(1 << 15)
-#define UOCMUX			0x04
+#define UOCMUX			(0x04/sizeof(u32))
 #define PMUX_HOST		0x02
 #define PMUX_DEVICE		0x03
 #define PUEN_SET		(1 << 2)
-#define UDCDEVCTL		0x404
+#define UDCDEVCTL		(0x404/sizeof(u32))
 #define UDC_SD_SET		(1 << 10)
-#define UOCCTL			0x0C
+#define UOCCTL			(0x0C/sizeof(u32))
 #define PADEN_SET		(1 << 7)
 
 /**
@@ -445,6 +446,8 @@ static void enable_USB_port4(struct southbridge_amd_cs5536_dts_config *sb)
 	if (dev) {
 		bar = (u32 *) pci_read_config32(dev, PCI_BASE_ADDRESS_0);
 
+		printk(BIOS_DEBUG, "UOCMUX is %x\n", *(bar + UOCMUX));
+
 		*(bar + UOCMUX) &= PUEN_SET;
 
 		/* Host or Device? */
@@ -463,6 +466,7 @@ static void enable_USB_port4(struct southbridge_amd_cs5536_dts_config *sb)
 			*(bar + UOCCAP) |= sb->pph;
 		}
 		printk(BIOS_DEBUG, "UOCCAP is %x\n", *(bar + UOCCAP));
+		printk(BIOS_DEBUG, "UOCMUX is %x\n", *(bar + UOCMUX));
 
 	}
 
@@ -489,6 +493,8 @@ static void enable_USB_port4(struct southbridge_amd_cs5536_dts_config *sb)
 		}
 	}
 
+	printk(BIOS_DEBUG, "UOCCTL is %x\n", *(bar + UOCCTL));
+
 	/* Disable virtual PCI UDC and OTG headers.  The kernel never
 	 * sees a header for this device.  It used to provide an OS
 	 * visible device, but that was defeatured.  There are still
diff --git a/southbridge/amd/cs5536/dts b/southbridge/amd/cs5536/dts
index 853170126a..dcfda42f99 100644
--- a/southbridge/amd/cs5536/dts
+++ b/southbridge/amd/cs5536/dts
@@ -66,6 +66,10 @@
 	pph = "0";
 	/* 0:off, xxxx:overcurrent setting, e.g. 0x3FEA.
 	 * See CS5536 - Data Book (pages 380-381).
+	 * And don't just set this to "1". You have to set it 
+	 * to values that make sense for the register. Do not set this
+	 * for your mainboard unless you have made sure of the register
+	 * settings!
 	 */
 	enable_USBP4_overcurrent = "0";