mb/google/dedede: Rework I2C enablement
In order to keep coreboot and FSP in sync for which i2c ports are enabled, disable all I2C ports in the baseboard, in both the PCI devices and the SerialIoI2cMode register. Each variant enables only the ports it uses by overriding the SerialIoI2cMode register index for those ports, and enabling the PCI device(s) and defining the attached devices. References to i2c ports which were off/disabled are removed from all variants, as they are redundant. TEST=build google/dedede (dexi), verify SerialIoI2cMode in static.c enables only the single port used (i2c4) Change-Id: I7fcab382cc0eaf4fb0bc9d8095587018b4e226b1 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/90897 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Sean Rhodes <sean@starlabs.systems>
This commit is contained in:
parent
58aed45731
commit
e1e79dc53b
32 changed files with 139 additions and 170 deletions
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@ -53,14 +53,9 @@ chip soc/intel/jasperlake
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}"
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# SerialIO device mode selection
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register "SerialIoI2cMode" = "{
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[PchSerialIoIndexI2C0] = PchSerialIoPci,
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[PchSerialIoIndexI2C1] = PchSerialIoDisabled,
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[PchSerialIoIndexI2C2] = PchSerialIoPci,
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[PchSerialIoIndexI2C3] = PchSerialIoDisabled,
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[PchSerialIoIndexI2C4] = PchSerialIoPci,
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[PchSerialIoIndexI2C5] = PchSerialIoDisabled,
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}"
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register "SerialIoI2cMode[PchSerialIoIndexI2C0]" = "PchSerialIoPci"
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register "SerialIoI2cMode[PchSerialIoIndexI2C2]" = "PchSerialIoPci"
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register "SerialIoI2cMode[PchSerialIoIndexI2C4]" = "PchSerialIoPci"
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# Power limit config
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register "power_limits_config[JSL_N4500_6W_CORE]" = "{
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@ -191,7 +186,6 @@ chip soc/intel/jasperlake
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device i2c 15 on end
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end
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end # I2C 0
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device pci 15.1 off end # I2C 1
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device pci 15.2 on
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probe TOUCHSCREEN TOUCHSCREEN_PRESENT
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chip drivers/i2c/generic
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@ -213,7 +207,6 @@ chip soc/intel/jasperlake
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device i2c 10 on end
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end
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end # I2C 2
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device pci 15.3 off end # I2C 3
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device pci 19.0 on
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chip drivers/i2c/rt5645
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register "hid" = ""10EC5650""
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@ -80,11 +80,11 @@ chip soc/intel/jasperlake
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register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC_SKIP)" # USB3/1 Type-A Port A1
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register "SerialIoI2cMode" = "{
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[PchSerialIoIndexI2C0] = PchSerialIoPci,
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[PchSerialIoIndexI2C1] = PchSerialIoPci,
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[PchSerialIoIndexI2C2] = PchSerialIoPci,
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[PchSerialIoIndexI2C3] = PchSerialIoPci,
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[PchSerialIoIndexI2C4] = PchSerialIoPci,
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[PchSerialIoIndexI2C0] = PchSerialIoDisabled,
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[PchSerialIoIndexI2C1] = PchSerialIoDisabled,
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[PchSerialIoIndexI2C2] = PchSerialIoDisabled,
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[PchSerialIoIndexI2C3] = PchSerialIoDisabled,
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[PchSerialIoIndexI2C4] = PchSerialIoDisabled,
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[PchSerialIoIndexI2C5] = PchSerialIoDisabled,
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}"
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@ -368,16 +368,16 @@ chip soc/intel/jasperlake
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end
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end # CNVi wifi
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device pci 14.5 on end # SDCard
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device pci 15.0 on end # I2C 0
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device pci 15.1 on end # I2C 1
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device pci 15.2 on end # I2C 2
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device pci 15.3 on end # I2C 3
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device pci 15.0 off end # I2C 0
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device pci 15.1 off end # I2C 1
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device pci 15.2 off end # I2C 2
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device pci 15.3 off end # I2C 3
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device pci 16.0 on end # HECI 1
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device pci 16.1 off end # HECI 2
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device pci 16.4 off end # HECI 3
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device pci 16.5 off end # HECI 4
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device pci 17.0 off end # SATA
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device pci 19.0 on end # I2C 4
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device pci 19.0 off end # I2C 4
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device pci 19.1 off end # I2C 5
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device pci 19.2 on end # UART 2
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device pci 1a.0 on end # eMMC
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@ -54,14 +54,10 @@ chip soc/intel/jasperlake
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},
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}"
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register "SerialIoI2cMode" = "{
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[PchSerialIoIndexI2C0] = PchSerialIoPci,
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[PchSerialIoIndexI2C1] = PchSerialIoDisabled,
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[PchSerialIoIndexI2C2] = PchSerialIoPci,
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[PchSerialIoIndexI2C3] = PchSerialIoDisabled,
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[PchSerialIoIndexI2C4] = PchSerialIoPci,
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[PchSerialIoIndexI2C5] = PchSerialIoPci,
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}"
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register "SerialIoI2cMode[PchSerialIoIndexI2C0]" = "PchSerialIoPci"
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register "SerialIoI2cMode[PchSerialIoIndexI2C2]" = "PchSerialIoPci"
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register "SerialIoI2cMode[PchSerialIoIndexI2C4]" = "PchSerialIoPci"
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register "SerialIoI2cMode[PchSerialIoIndexI2C5]" = "PchSerialIoPci"
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device domain 0 on
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device pci 04.0 on
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@ -50,14 +50,9 @@ chip soc/intel/jasperlake
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register "usb2_ports[5]" = "USB2_PORT_MID(OC_SKIP)" # UF Camera
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register "usb2_ports[6]" = "USB2_PORT_EMPTY" # Not Used
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register "SerialIoI2cMode" = "{
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[PchSerialIoIndexI2C0] = PchSerialIoPci,
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[PchSerialIoIndexI2C1] = PchSerialIoDisabled,
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[PchSerialIoIndexI2C2] = PchSerialIoPci,
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[PchSerialIoIndexI2C3] = PchSerialIoDisabled,
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[PchSerialIoIndexI2C4] = PchSerialIoPci,
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[PchSerialIoIndexI2C5] = PchSerialIoDisabled,
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}"
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register "SerialIoI2cMode[PchSerialIoIndexI2C0]" = "PchSerialIoPci"
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register "SerialIoI2cMode[PchSerialIoIndexI2C2]" = "PchSerialIoPci"
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register "SerialIoI2cMode[PchSerialIoIndexI2C4]" = "PchSerialIoPci"
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register "tcc_offset" = "10" # TCC of 95C
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@ -126,7 +121,6 @@ chip soc/intel/jasperlake
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device i2c 0x2c on end
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end
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end # I2C 0
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device pci 15.1 off end # I2C 1
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device pci 15.2 on
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chip drivers/i2c/hid
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register "generic.hid" = ""GTCH7503""
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@ -164,7 +158,6 @@ chip soc/intel/jasperlake
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device i2c 10 on end
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end
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end # I2C 2
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device pci 15.3 off end # I2C 3
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device pci 19.0 on
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chip drivers/i2c/generic
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register "hid" = ""10EC5682""
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@ -73,14 +73,11 @@ chip soc/intel/jasperlake
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register "usb2_ports[5]" = "USB2_PORT_MID(OC_SKIP)" # UF Camera
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register "usb2_ports[6]" = "USB2_PORT_MID(OC_SKIP)" # WF Camera
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register "SerialIoI2cMode" = "{
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[PchSerialIoIndexI2C0] = PchSerialIoPci,
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[PchSerialIoIndexI2C1] = PchSerialIoPci,
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[PchSerialIoIndexI2C2] = PchSerialIoPci,
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[PchSerialIoIndexI2C3] = PchSerialIoDisabled,
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[PchSerialIoIndexI2C4] = PchSerialIoPci,
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[PchSerialIoIndexI2C5] = PchSerialIoPci,
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}"
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register "SerialIoI2cMode[PchSerialIoIndexI2C0]" = "PchSerialIoPci"
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register "SerialIoI2cMode[PchSerialIoIndexI2C1]" = "PchSerialIoPci"
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register "SerialIoI2cMode[PchSerialIoIndexI2C2]" = "PchSerialIoPci"
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register "SerialIoI2cMode[PchSerialIoIndexI2C4]" = "PchSerialIoPci"
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register "SerialIoI2cMode[PchSerialIoIndexI2C5]" = "PchSerialIoPci"
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# Enable Acoustic noise mitigation and set slew rate to 1/8
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# Rest of the parameters are 0 by default.
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@ -258,7 +255,6 @@ chip soc/intel/jasperlake
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device i2c 10 on end
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end
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end # I2C 2
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device pci 15.3 off end # I2C 3
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device pci 19.0 on
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chip drivers/i2c/generic
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register "hid" = ""10EC5682""
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@ -33,6 +33,8 @@ chip soc/intel/jasperlake
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},
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}"
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register "SerialIoI2cMode[PchSerialIoIndexI2C4]" = "PchSerialIoPci"
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# Power limit config
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register "power_limits_config[JSL_N4500_6W_CORE]" = "{
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.tdp_pl1_override = 6,
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@ -192,10 +194,6 @@ chip soc/intel/jasperlake
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end
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end
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end # USB xHCI
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device pci 15.0 off end # I2C 0
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device pci 15.1 off end # I2C 1
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device pci 15.2 off end # I2C 2
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device pci 15.3 off end # I2C 3
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device pci 19.0 on
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chip drivers/i2c/generic
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register "hid" = ""10EC5682""
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@ -86,6 +86,13 @@ chip soc/intel/jasperlake
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.fall_time_ns = 8,
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},
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}"
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register "SerialIoI2cMode[PchSerialIoIndexI2C0]" = "PchSerialIoPci"
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register "SerialIoI2cMode[PchSerialIoIndexI2C1]" = "PchSerialIoPci"
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register "SerialIoI2cMode[PchSerialIoIndexI2C2]" = "PchSerialIoPci"
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register "SerialIoI2cMode[PchSerialIoIndexI2C3]" = "PchSerialIoPci"
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register "SerialIoI2cMode[PchSerialIoIndexI2C4]" = "PchSerialIoPci"
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device domain 0 on
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device pci 04.0 on
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chip drivers/intel/dptf
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@ -41,6 +41,12 @@ chip soc/intel/jasperlake
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},
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}"
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register "SerialIoI2cMode[PchSerialIoIndexI2C0]" = "PchSerialIoPci"
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register "SerialIoI2cMode[PchSerialIoIndexI2C1]" = "PchSerialIoPci"
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register "SerialIoI2cMode[PchSerialIoIndexI2C2]" = "PchSerialIoPci"
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register "SerialIoI2cMode[PchSerialIoIndexI2C3]" = "PchSerialIoPci"
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register "SerialIoI2cMode[PchSerialIoIndexI2C4]" = "PchSerialIoPci"
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register "disable_external_bypass_vr" = "1" # Does not support external vnn power rail
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register "tcc_offset" = "10" # TCC of 95C
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register "usb3_ports[1]" = "USB3_PORT_EMPTY" # None
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register "usb3_ports[3]" = "USB3_PORT_EMPTY" # None
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register "SerialIoI2cMode" = "{
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[PchSerialIoIndexI2C0] = PchSerialIoPci,
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[PchSerialIoIndexI2C1] = PchSerialIoDisabled,
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[PchSerialIoIndexI2C2] = PchSerialIoDisabled,
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[PchSerialIoIndexI2C3] = PchSerialIoDisabled,
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[PchSerialIoIndexI2C4] = PchSerialIoPci,
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[PchSerialIoIndexI2C5] = PchSerialIoDisabled,
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}"
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register "SerialIoI2cMode[PchSerialIoIndexI2C0]" = "PchSerialIoPci"
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# Intel Common SoC Config
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#+-------------------+---------------------------+
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@ -120,9 +113,6 @@ chip soc/intel/jasperlake
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device i2c 15 on end
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end
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end #I2C 0
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device pci 15.1 off end # I2C 1
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device pci 15.2 off end # I2C 2
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device pci 15.3 off end # I2C 3
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device pci 19.0 on
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chip drivers/i2c/generic
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register "hid" = ""10EC5682""
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register "usb3_ports[1]" = "USB3_PORT_EMPTY" # None
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register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC_SKIP)" # LTE
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register "SerialIoI2cMode" = "{
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[PchSerialIoIndexI2C0] = PchSerialIoPci,
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[PchSerialIoIndexI2C1] = PchSerialIoDisabled,
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[PchSerialIoIndexI2C2] = PchSerialIoPci,
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[PchSerialIoIndexI2C3] = PchSerialIoDisabled,
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[PchSerialIoIndexI2C4] = PchSerialIoPci,
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[PchSerialIoIndexI2C5] = PchSerialIoDisabled,
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}"
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register "SerialIoI2cMode[PchSerialIoIndexI2C0]" = "PchSerialIoPci"
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register "SerialIoI2cMode[PchSerialIoIndexI2C2]" = "PchSerialIoPci"
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register "SerialIoI2cMode[PchSerialIoIndexI2C4]" = "PchSerialIoPci"
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# Intel Common SoC Config
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#+-------------------+---------------------------+
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@ -155,7 +150,6 @@ chip soc/intel/jasperlake
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device i2c 2c on end
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end
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end #I2C 0
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device pci 15.1 off end # I2C 1
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device pci 15.2 on
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chip drivers/i2c/hid
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register "generic.hid" = ""WDHT0002""
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@ -246,7 +240,6 @@ chip soc/intel/jasperlake
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device i2c 40 on end
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end
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end # I2C 2
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device pci 15.3 off end # I2C 3
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device pci 1c.7 on end
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device pci 19.0 on
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chip drivers/i2c/da7219
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@ -25,6 +25,8 @@ chip soc/intel/jasperlake
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},
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}"
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register "SerialIoI2cMode[PchSerialIoIndexI2C4]" = "PchSerialIoPci"
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# Power limit config
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register "power_limits_config[JSL_N4500_6W_CORE]" = "{
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.tdp_pl1_override = 6,
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end
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end
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end # USB xHCI
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device pci 15.0 off end # I2C 0
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device pci 15.1 off end # I2C 1
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device pci 15.2 off end # I2C 2
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device pci 15.3 off end # I2C 3
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device pci 19.0 on
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chip drivers/i2c/generic
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register "hid" = ""RTL5682""
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},
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}"
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register "SerialIoI2cMode[PchSerialIoIndexI2C4]" = "PchSerialIoPci"
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# Power limit config
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register "power_limits_config[JSL_N4500_6W_CORE]" = "{
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.tdp_pl1_override = 6,
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end
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end
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end # USB xHCI
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device pci 15.0 off end # I2C 0
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device pci 15.1 off end # I2C 1
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device pci 15.2 off end # I2C 2
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device pci 15.3 off end # I2C 3
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device pci 19.0 on
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chip drivers/i2c/generic
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register "hid" = ""RTL5682""
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@ -25,6 +25,8 @@ chip soc/intel/jasperlake
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},
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}"
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register "SerialIoI2cMode[PchSerialIoIndexI2C4]" = "PchSerialIoPci"
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# Power limit config
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register "power_limits_config[JSL_N4500_6W_CORE]" = "{
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.tdp_pl1_override = 6,
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end
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end
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end # USB xHCI
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device pci 15.0 off end # I2C 0
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device pci 15.1 off end # I2C 1
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device pci 15.2 off end # I2C 2
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device pci 15.3 off end # I2C 3
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device pci 19.0 on
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chip drivers/i2c/generic
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register "hid" = ""RTL5682""
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},
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}"
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register "SerialIoI2cMode[PchSerialIoIndexI2C0]" = "PchSerialIoPci"
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register "SerialIoI2cMode[PchSerialIoIndexI2C1]" = "PchSerialIoPci"
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register "SerialIoI2cMode[PchSerialIoIndexI2C2]" = "PchSerialIoPci"
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register "SerialIoI2cMode[PchSerialIoIndexI2C3]" = "PchSerialIoPci"
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register "SerialIoI2cMode[PchSerialIoIndexI2C4]" = "PchSerialIoPci"
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register "tcc_offset" = "20" # TCC of 85C
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# Enable Acoustic noise mitigation and set slew rate to 1/4
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@ -9,14 +9,8 @@ chip soc/intel/jasperlake
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register "usb3_ports[1]" = "USB3_PORT_EMPTY" # None
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register "usb3_ports[3]" = "USB3_PORT_EMPTY" # None
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register "SerialIoI2cMode" = "{
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[PchSerialIoIndexI2C0] = PchSerialIoPci,
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[PchSerialIoIndexI2C1] = PchSerialIoDisabled,
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[PchSerialIoIndexI2C2] = PchSerialIoDisabled,
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[PchSerialIoIndexI2C3] = PchSerialIoDisabled,
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[PchSerialIoIndexI2C4] = PchSerialIoPci,
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[PchSerialIoIndexI2C5] = PchSerialIoDisabled,
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}"
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register "SerialIoI2cMode[PchSerialIoIndexI2C0]" = "PchSerialIoPci"
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register "SerialIoI2cMode[PchSerialIoIndexI2C4]" = "PchSerialIoPci"
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# Intel Common SoC Config
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#+-------------------+---------------------------+
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|
|
@ -119,9 +113,6 @@ chip soc/intel/jasperlake
|
|||
device i2c 2c on end
|
||||
end
|
||||
end #I2C 0
|
||||
device pci 15.1 off end # I2C 1
|
||||
device pci 15.2 off end # I2C 2
|
||||
device pci 15.3 off end # I2C 3
|
||||
device pci 19.0 on
|
||||
chip drivers/i2c/cs42l42
|
||||
register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_D16)"
|
||||
|
|
|
|||
|
|
@ -59,13 +59,9 @@ chip soc/intel/jasperlake
|
|||
},
|
||||
}"
|
||||
|
||||
register "SerialIoI2cMode" = "{
|
||||
[PchSerialIoIndexI2C0] = PchSerialIoPci,
|
||||
[PchSerialIoIndexI2C1] = PchSerialIoDisabled,
|
||||
[PchSerialIoIndexI2C2] = PchSerialIoPci,
|
||||
[PchSerialIoIndexI2C3] = PchSerialIoDisabled,
|
||||
[PchSerialIoIndexI2C4] = PchSerialIoPci,
|
||||
}"
|
||||
register "SerialIoI2cMode[PchSerialIoIndexI2C0]" = "PchSerialIoPci"
|
||||
register "SerialIoI2cMode[PchSerialIoIndexI2C2]" = "PchSerialIoPci"
|
||||
register "SerialIoI2cMode[PchSerialIoIndexI2C4]" = "PchSerialIoPci"
|
||||
|
||||
# USB Port Configuration
|
||||
register "usb2_ports[5]" = "USB2_PORT_MID(OC_SKIP)" # Camera
|
||||
|
|
|
|||
|
|
@ -49,14 +49,11 @@ chip soc/intel/jasperlake
|
|||
register "usb2_ports[5]" = "USB2_PORT_MID(OC_SKIP)" # UF Camera
|
||||
register "usb2_ports[6]" = "USB2_PORT_MID(OC_SKIP)" # WF Camera
|
||||
|
||||
register "SerialIoI2cMode" = "{
|
||||
[PchSerialIoIndexI2C0] = PchSerialIoPci,
|
||||
[PchSerialIoIndexI2C1] = PchSerialIoPci,
|
||||
[PchSerialIoIndexI2C2] = PchSerialIoPci,
|
||||
[PchSerialIoIndexI2C3] = PchSerialIoDisabled,
|
||||
[PchSerialIoIndexI2C4] = PchSerialIoPci,
|
||||
[PchSerialIoIndexI2C5] = PchSerialIoPci,
|
||||
}"
|
||||
register "SerialIoI2cMode[PchSerialIoIndexI2C0]" = "PchSerialIoPci"
|
||||
register "SerialIoI2cMode[PchSerialIoIndexI2C1]" = "PchSerialIoPci"
|
||||
register "SerialIoI2cMode[PchSerialIoIndexI2C2]" = "PchSerialIoPci"
|
||||
register "SerialIoI2cMode[PchSerialIoIndexI2C4]" = "PchSerialIoPci"
|
||||
register "SerialIoI2cMode[PchSerialIoIndexI2C5]" = "PchSerialIoPci"
|
||||
|
||||
register "SerialIoGSpiMode[PchSerialIoIndexGSPI0]" = "PchSerialIoDisabled" # Disable GSPI0
|
||||
register "SerialIoGSpiCsMode[PchSerialIoIndexGSPI0]" = "0"
|
||||
|
|
@ -237,7 +234,6 @@ chip soc/intel/jasperlake
|
|||
device i2c 10 on end
|
||||
end
|
||||
end # I2C 2
|
||||
device pci 15.3 off end # I2C 3
|
||||
device pci 19.0 on
|
||||
chip drivers/i2c/generic
|
||||
register "hid" = ""10EC5682""
|
||||
|
|
|
|||
|
|
@ -35,6 +35,12 @@ chip soc/intel/jasperlake
|
|||
},
|
||||
}"
|
||||
|
||||
register "SerialIoI2cMode[PchSerialIoIndexI2C0]" = "PchSerialIoPci"
|
||||
register "SerialIoI2cMode[PchSerialIoIndexI2C1]" = "PchSerialIoPci"
|
||||
register "SerialIoI2cMode[PchSerialIoIndexI2C2]" = "PchSerialIoPci"
|
||||
register "SerialIoI2cMode[PchSerialIoIndexI2C3]" = "PchSerialIoPci"
|
||||
register "SerialIoI2cMode[PchSerialIoIndexI2C4]" = "PchSerialIoPci"
|
||||
|
||||
register "tcc_offset" = "20" # TCC of 85C
|
||||
|
||||
register "SerialIoGSpiMode[PchSerialIoIndexGSPI0]" = "PchSerialIoDisabled" # Disable GSPI0
|
||||
|
|
|
|||
|
|
@ -11,14 +11,11 @@ chip soc/intel/jasperlake
|
|||
register "usb2_ports[5]" = "USB2_PORT_MID(OC_SKIP)" # Camera
|
||||
register "usb2_ports[6]" = "USB2_PORT_MID(OC_SKIP)" # WF Camera
|
||||
|
||||
register "SerialIoI2cMode" = "{
|
||||
[PchSerialIoIndexI2C0] = PchSerialIoPci,
|
||||
[PchSerialIoIndexI2C1] = PchSerialIoPci,
|
||||
[PchSerialIoIndexI2C2] = PchSerialIoPci,
|
||||
[PchSerialIoIndexI2C3] = PchSerialIoDisabled,
|
||||
[PchSerialIoIndexI2C4] = PchSerialIoPci,
|
||||
[PchSerialIoIndexI2C5] = PchSerialIoPci,
|
||||
}"
|
||||
register "SerialIoI2cMode[PchSerialIoIndexI2C0]" = "PchSerialIoPci"
|
||||
register "SerialIoI2cMode[PchSerialIoIndexI2C1]" = "PchSerialIoPci"
|
||||
register "SerialIoI2cMode[PchSerialIoIndexI2C2]" = "PchSerialIoPci"
|
||||
register "SerialIoI2cMode[PchSerialIoIndexI2C4]" = "PchSerialIoPci"
|
||||
register "SerialIoI2cMode[PchSerialIoIndexI2C5]" = "PchSerialIoPci"
|
||||
|
||||
# Intel Common SoC Config
|
||||
#+-------------------+---------------------------+
|
||||
|
|
@ -244,7 +241,6 @@ chip soc/intel/jasperlake
|
|||
end
|
||||
|
||||
end # I2C 2
|
||||
device pci 15.3 off end #I2C 3
|
||||
device pci 19.0 on
|
||||
chip drivers/i2c/generic
|
||||
register "hid" = ""10EC5682""
|
||||
|
|
|
|||
|
|
@ -56,6 +56,12 @@ chip soc/intel/jasperlake
|
|||
},
|
||||
}"
|
||||
|
||||
register "SerialIoI2cMode[PchSerialIoIndexI2C0]" = "PchSerialIoPci"
|
||||
register "SerialIoI2cMode[PchSerialIoIndexI2C1]" = "PchSerialIoPci"
|
||||
register "SerialIoI2cMode[PchSerialIoIndexI2C2]" = "PchSerialIoPci"
|
||||
register "SerialIoI2cMode[PchSerialIoIndexI2C3]" = "PchSerialIoPci"
|
||||
register "SerialIoI2cMode[PchSerialIoIndexI2C4]" = "PchSerialIoPci"
|
||||
|
||||
# Power limit config
|
||||
register "power_limits_config[JSL_N4500_6W_CORE]" = "{
|
||||
.tdp_pl1_override = 7,
|
||||
|
|
|
|||
|
|
@ -15,14 +15,9 @@ chip soc/intel/jasperlake
|
|||
# USB Port Configuration
|
||||
register "usb2_ports[5]" = "USB2_PORT_MID(OC_SKIP)" # Camera
|
||||
|
||||
register "SerialIoI2cMode" = "{
|
||||
[PchSerialIoIndexI2C0] = PchSerialIoPci,
|
||||
[PchSerialIoIndexI2C1] = PchSerialIoDisabled,
|
||||
[PchSerialIoIndexI2C2] = PchSerialIoPci,
|
||||
[PchSerialIoIndexI2C3] = PchSerialIoDisabled,
|
||||
[PchSerialIoIndexI2C4] = PchSerialIoPci,
|
||||
[PchSerialIoIndexI2C5] = PchSerialIoDisabled,
|
||||
}"
|
||||
register "SerialIoI2cMode[PchSerialIoIndexI2C0]" = "PchSerialIoPci"
|
||||
register "SerialIoI2cMode[PchSerialIoIndexI2C2]" = "PchSerialIoPci"
|
||||
register "SerialIoI2cMode[PchSerialIoIndexI2C4]" = "PchSerialIoPci"
|
||||
|
||||
# Intel Common SoC Config
|
||||
#+-------------------+---------------------------+
|
||||
|
|
@ -180,7 +175,6 @@ chip soc/intel/jasperlake
|
|||
device i2c 15 on end
|
||||
end
|
||||
end #I2C 0
|
||||
device pci 15.1 off end #I2C 1
|
||||
device pci 15.2 on
|
||||
chip drivers/i2c/generic
|
||||
register "hid" = ""ELAN0001""
|
||||
|
|
@ -240,7 +234,6 @@ chip soc/intel/jasperlake
|
|||
device i2c 0x5d on end
|
||||
end
|
||||
end # I2C 2
|
||||
device pci 15.3 off end #I2C 3
|
||||
device pci 1c.7 on
|
||||
chip drivers/wifi/generic
|
||||
register "wake" = "GPE0_DW2_03"
|
||||
|
|
|
|||
|
|
@ -3,14 +3,9 @@ chip soc/intel/jasperlake
|
|||
# USB Port Configuration
|
||||
register "usb2_ports[5]" = "USB2_PORT_MID(OC_SKIP)" # Camera
|
||||
|
||||
register "SerialIoI2cMode" = "{
|
||||
[PchSerialIoIndexI2C0] = PchSerialIoPci,
|
||||
[PchSerialIoIndexI2C1] = PchSerialIoDisabled,
|
||||
[PchSerialIoIndexI2C2] = PchSerialIoPci,
|
||||
[PchSerialIoIndexI2C3] = PchSerialIoDisabled,
|
||||
[PchSerialIoIndexI2C4] = PchSerialIoPci,
|
||||
[PchSerialIoIndexI2C5] = PchSerialIoDisabled,
|
||||
}"
|
||||
register "SerialIoI2cMode[PchSerialIoIndexI2C0]" = "PchSerialIoPci"
|
||||
register "SerialIoI2cMode[PchSerialIoIndexI2C2]" = "PchSerialIoPci"
|
||||
register "SerialIoI2cMode[PchSerialIoIndexI2C4]" = "PchSerialIoPci"
|
||||
|
||||
# Intel Common SoC Config
|
||||
#+-------------------+---------------------------+
|
||||
|
|
@ -114,7 +109,6 @@ chip soc/intel/jasperlake
|
|||
device i2c 15 on end
|
||||
end
|
||||
end #I2C 0
|
||||
device pci 15.1 off end # I2C 1
|
||||
device pci 15.2 on
|
||||
chip drivers/i2c/hid
|
||||
register "generic.hid" = ""GDIX0000""
|
||||
|
|
@ -132,7 +126,6 @@ chip soc/intel/jasperlake
|
|||
device i2c 0x5d on end
|
||||
end
|
||||
end # I2C 2
|
||||
device pci 15.3 off end # I2C 3
|
||||
device pci 1c.7 on
|
||||
chip drivers/wifi/generic
|
||||
register "wake" = "GPE0_DW2_03"
|
||||
|
|
|
|||
|
|
@ -95,6 +95,12 @@ chip soc/intel/jasperlake
|
|||
},
|
||||
}"
|
||||
|
||||
register "SerialIoI2cMode[PchSerialIoIndexI2C0]" = "PchSerialIoPci"
|
||||
register "SerialIoI2cMode[PchSerialIoIndexI2C1]" = "PchSerialIoPci"
|
||||
register "SerialIoI2cMode[PchSerialIoIndexI2C2]" = "PchSerialIoPci"
|
||||
register "SerialIoI2cMode[PchSerialIoIndexI2C3]" = "PchSerialIoPci"
|
||||
register "SerialIoI2cMode[PchSerialIoIndexI2C4]" = "PchSerialIoPci"
|
||||
|
||||
# Power limit config
|
||||
register "power_limits_config[JSL_N4500_6W_CORE]" = "{
|
||||
.tdp_pl1_override = 7,
|
||||
|
|
|
|||
|
|
@ -62,14 +62,10 @@ chip soc/intel/jasperlake
|
|||
},
|
||||
}"
|
||||
|
||||
register "SerialIoI2cMode" = "{
|
||||
[PchSerialIoIndexI2C0] = PchSerialIoPci,
|
||||
[PchSerialIoIndexI2C1] = PchSerialIoPci,
|
||||
[PchSerialIoIndexI2C2] = PchSerialIoPci,
|
||||
[PchSerialIoIndexI2C3] = PchSerialIoDisabled,
|
||||
[PchSerialIoIndexI2C4] = PchSerialIoPci,
|
||||
[PchSerialIoIndexI2C5] = PchSerialIoDisabled,
|
||||
}"
|
||||
register "SerialIoI2cMode[PchSerialIoIndexI2C0]" = "PchSerialIoPci"
|
||||
register "SerialIoI2cMode[PchSerialIoIndexI2C1]" = "PchSerialIoPci"
|
||||
register "SerialIoI2cMode[PchSerialIoIndexI2C2]" = "PchSerialIoPci"
|
||||
register "SerialIoI2cMode[PchSerialIoIndexI2C4]" = "PchSerialIoPci"
|
||||
|
||||
# Power limit config
|
||||
register "power_limits_config[JSL_N4500_6W_CORE]" = "{
|
||||
|
|
@ -243,7 +239,6 @@ chip soc/intel/jasperlake
|
|||
device i2c 15 on end
|
||||
end
|
||||
end # I2C 2
|
||||
device pci 15.3 off end # I2C 3
|
||||
device pci 19.0 on
|
||||
chip drivers/i2c/generic
|
||||
register "hid" = ""10EC5682""
|
||||
|
|
|
|||
|
|
@ -46,13 +46,9 @@ chip soc/intel/jasperlake
|
|||
},
|
||||
}"
|
||||
|
||||
register "SerialIoI2cMode" = "{
|
||||
[PchSerialIoIndexI2C0] = PchSerialIoPci,
|
||||
[PchSerialIoIndexI2C1] = PchSerialIoDisabled,
|
||||
[PchSerialIoIndexI2C2] = PchSerialIoPci,
|
||||
[PchSerialIoIndexI2C3] = PchSerialIoDisabled,
|
||||
[PchSerialIoIndexI2C4] = PchSerialIoPci,
|
||||
}"
|
||||
register "SerialIoI2cMode[PchSerialIoIndexI2C0]" = "PchSerialIoPci"
|
||||
register "SerialIoI2cMode[PchSerialIoIndexI2C2]" = "PchSerialIoPci"
|
||||
register "SerialIoI2cMode[PchSerialIoIndexI2C4]" = "PchSerialIoPci"
|
||||
|
||||
# USB Port Configuration
|
||||
register "usb2_ports[0]" = "{
|
||||
|
|
|
|||
|
|
@ -77,6 +77,13 @@ chip soc/intel/jasperlake
|
|||
.fall_time_ns = 8,
|
||||
},
|
||||
}"
|
||||
|
||||
register "SerialIoI2cMode[PchSerialIoIndexI2C0]" = "PchSerialIoPci"
|
||||
register "SerialIoI2cMode[PchSerialIoIndexI2C1]" = "PchSerialIoPci"
|
||||
register "SerialIoI2cMode[PchSerialIoIndexI2C2]" = "PchSerialIoPci"
|
||||
register "SerialIoI2cMode[PchSerialIoIndexI2C3]" = "PchSerialIoPci"
|
||||
register "SerialIoI2cMode[PchSerialIoIndexI2C4]" = "PchSerialIoPci"
|
||||
|
||||
device domain 0 on
|
||||
device pci 04.0 on
|
||||
chip drivers/intel/dptf
|
||||
|
|
|
|||
|
|
@ -59,6 +59,12 @@ chip soc/intel/jasperlake
|
|||
},
|
||||
}"
|
||||
|
||||
register "SerialIoI2cMode[PchSerialIoIndexI2C0]" = "PchSerialIoPci"
|
||||
register "SerialIoI2cMode[PchSerialIoIndexI2C1]" = "PchSerialIoPci"
|
||||
register "SerialIoI2cMode[PchSerialIoIndexI2C2]" = "PchSerialIoPci"
|
||||
register "SerialIoI2cMode[PchSerialIoIndexI2C3]" = "PchSerialIoPci"
|
||||
register "SerialIoI2cMode[PchSerialIoIndexI2C4]" = "PchSerialIoPci"
|
||||
|
||||
# USB Port Configuration
|
||||
register "usb2_ports[2]" = "{
|
||||
.enable = 1,
|
||||
|
|
|
|||
|
|
@ -38,6 +38,10 @@ chip soc/intel/jasperlake
|
|||
},
|
||||
}"
|
||||
|
||||
register "SerialIoI2cMode[PchSerialIoIndexI2C1]" = "PchSerialIoPci"
|
||||
register "SerialIoI2cMode[PchSerialIoIndexI2C2]" = "PchSerialIoPci"
|
||||
register "SerialIoI2cMode[PchSerialIoIndexI2C4]" = "PchSerialIoPci"
|
||||
|
||||
register "disable_external_bypass_vr" = "1" # Does not support external vnn power rail
|
||||
|
||||
# Power limit config
|
||||
|
|
@ -183,7 +187,6 @@ chip soc/intel/jasperlake
|
|||
end
|
||||
end
|
||||
end # USB xHCI
|
||||
device pci 15.0 off end # I2C 0
|
||||
device pci 15.2 on
|
||||
chip drivers/i2c/hid
|
||||
register "generic.hid" = ""ILTK0001""
|
||||
|
|
@ -200,7 +203,6 @@ chip soc/intel/jasperlake
|
|||
device i2c 41 on end
|
||||
end
|
||||
end # I2C 2
|
||||
device pci 15.3 off end #I2C 3
|
||||
device pci 1c.7 on
|
||||
chip drivers/wifi/generic
|
||||
register "wake" = "GPE0_DW2_03"
|
||||
|
|
|
|||
|
|
@ -73,14 +73,11 @@ chip soc/intel/jasperlake
|
|||
.pre_emp_bit = USB2_HALF_BIT_PRE_EMP,
|
||||
}" # WWAN
|
||||
|
||||
register "SerialIoI2cMode" = "{
|
||||
[PchSerialIoIndexI2C0] = PchSerialIoPci,
|
||||
[PchSerialIoIndexI2C1] = PchSerialIoDisabled,
|
||||
[PchSerialIoIndexI2C2] = PchSerialIoPci,
|
||||
[PchSerialIoIndexI2C3] = PchSerialIoPci,
|
||||
[PchSerialIoIndexI2C4] = PchSerialIoPci,
|
||||
[PchSerialIoIndexI2C5] = PchSerialIoPci,
|
||||
}"
|
||||
register "SerialIoI2cMode[PchSerialIoIndexI2C0]" = "PchSerialIoPci"
|
||||
register "SerialIoI2cMode[PchSerialIoIndexI2C2]" = "PchSerialIoPci"
|
||||
register "SerialIoI2cMode[PchSerialIoIndexI2C3]" = "PchSerialIoPci"
|
||||
register "SerialIoI2cMode[PchSerialIoIndexI2C4]" = "PchSerialIoPci"
|
||||
register "SerialIoI2cMode[PchSerialIoIndexI2C5]" = "PchSerialIoPci"
|
||||
|
||||
# Power limit config
|
||||
register "power_limits_config[JSL_N4500_6W_CORE]" = "{
|
||||
|
|
|
|||
|
|
@ -25,6 +25,8 @@ chip soc/intel/jasperlake
|
|||
},
|
||||
}"
|
||||
|
||||
register "SerialIoI2cMode[PchSerialIoIndexI2C4]" = "PchSerialIoPci"
|
||||
|
||||
# Power limit config
|
||||
register "power_limits_config[JSL_N4500_6W_CORE]" = "{
|
||||
.tdp_pl1_override = 6,
|
||||
|
|
@ -261,10 +263,6 @@ chip soc/intel/jasperlake
|
|||
end
|
||||
end
|
||||
end # USB xHCI
|
||||
device pci 15.0 off end # I2C 0
|
||||
device pci 15.1 off end # I2C 1
|
||||
device pci 15.2 off end # I2C 2
|
||||
device pci 15.3 off end # I2C 3
|
||||
device pci 19.0 on
|
||||
chip drivers/i2c/generic
|
||||
register "hid" = ""RTL5682""
|
||||
|
|
|
|||
|
|
@ -54,6 +54,12 @@ chip soc/intel/jasperlake
|
|||
},
|
||||
}"
|
||||
|
||||
register "SerialIoI2cMode[PchSerialIoIndexI2C0]" = "PchSerialIoPci"
|
||||
register "SerialIoI2cMode[PchSerialIoIndexI2C1]" = "PchSerialIoPci"
|
||||
register "SerialIoI2cMode[PchSerialIoIndexI2C2]" = "PchSerialIoPci"
|
||||
register "SerialIoI2cMode[PchSerialIoIndexI2C3]" = "PchSerialIoPci"
|
||||
register "SerialIoI2cMode[PchSerialIoIndexI2C4]" = "PchSerialIoPci"
|
||||
|
||||
device domain 0 on
|
||||
device pci 05.0 on end # IPU - MIPI Camera
|
||||
device pci 14.0 on
|
||||
|
|
|
|||
|
|
@ -49,6 +49,13 @@ chip soc/intel/jasperlake
|
|||
}
|
||||
},
|
||||
}"
|
||||
|
||||
register "SerialIoI2cMode[PchSerialIoIndexI2C0]" = "PchSerialIoPci"
|
||||
register "SerialIoI2cMode[PchSerialIoIndexI2C1]" = "PchSerialIoPci"
|
||||
register "SerialIoI2cMode[PchSerialIoIndexI2C2]" = "PchSerialIoPci"
|
||||
register "SerialIoI2cMode[PchSerialIoIndexI2C3]" = "PchSerialIoPci"
|
||||
register "SerialIoI2cMode[PchSerialIoIndexI2C4]" = "PchSerialIoPci"
|
||||
|
||||
device domain 0 on
|
||||
device pci 05.0 on # IPU - MIPI Camera
|
||||
chip drivers/intel/mipi_camera
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue