OK, this includes all the mods that should give you a compileable
initram. Gets errors as we don't have ram support yet, working that now. Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@354 f3766cd6-281f-0410-b1cd-43a5c92072e9
This commit is contained in:
Ronald G. Minnich
parent
7c6002b003
commit
e19d69c558
5 changed files with 141 additions and 18 deletions
21
include/post_code.h
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21
include/post_code.h
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@ -0,0 +1,21 @@
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/*
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* This file is part of the LinuxBIOS project.
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*
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* Copyright (C) 2007 Ronald G. Minnich <rminnich@gmail.com>
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#define POST_START_OF_MAIN (0x01)
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@ -40,3 +40,6 @@ config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
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help
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Mainboard specific PCI subsystem device ID.
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@ -19,31 +19,24 @@
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## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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##
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#
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# VPD or SIP ROM or ... how does NVIDIA call it?
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# Some space to cope with dirty southbridge tricks.
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# Do we want to put our own stuff there, too?
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#
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$(obj)/linuxbios.vpd:
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$(Q)printf " BUILD DUMMY VPD\n"
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$(Q)dd if=/dev/zero of=$(obj)/linuxbios.vpd bs=256 count=1 $(SILENT)
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#
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# This is going to be the init RAM code.
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#
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# The initram file is always uncompressed. It belongs into the mainboard
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# directory and is built from what was auto.c in v2.
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#
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# It should probably be renamed, as it does more than initram.
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# auto.c is a bit too meaningless though.
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#
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$(obj)/linuxbios.initram: $(obj)/stage0.init $(obj)/stage0.o $(obj)/mainboard/$(MAINBOARDDIR)/initram.o
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INITRAM_OBJ=$(obj)/stage0.init $(obj)/stage0.o $(obj)/mainboard/$(MAINBOARDDIR)/initram.o \
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$(obj)/northbridge/amd/geodelx/raminit.o \
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$(obj)/southbridge/amd/cs5536/smbus_initram.o \
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$(obj)/southbridge/amd/cs5536/cs5536_early_setup.o\
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$(obj)/arch/x86/geodelx.o
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$(obj)/linuxbios.initram: $(INITRAM_OBJ)
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$(Q)# initram links against stage0
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$(Q)printf " LD $(subst $(shell pwd)/,,$(@))\n"
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$(Q)$(LD) -R $(obj)/stage0.o -Ttext 0x80000 \
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$(obj)/mainboard/$(MAINBOARDDIR)/initram.o \
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$(obj)/northbridge/amd/geodelx/raminit.o \
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$(obj)/southbridge/amd/cs5536/smbus_initram.o \
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$(obj)/southbridge/amd/cs5536/cs5536_early_setup.o\
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$(obj)/arch/x86/geodelx.o\
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--entry=main -o $(obj)/linuxbios.initram.o
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$(Q)printf " OBJCOPY $(subst $(shell pwd)/,,$(@))\n"
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$(Q)$(OBJCOPY) -O binary $(obj)/linuxbios.initram.o \
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@ -76,7 +69,7 @@ $(obj)/option_table: $(obj)/mainboard/$(MAINBOARDDIR)/option_table.o
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STAGE2_MAINBOARD_OBJ = mainboard.o vga.o
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STAGE2_CHIPSET_OBJ =
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STAGE2_CHIPSET_OBJ =
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$(obj)/mainboard/$(MAINBOARDDIR)/%.o: $(src)/mainboard/$(MAINBOARDDIR)/%.c
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$(Q)mkdir -p $(obj)/mainboard/$(MAINBOARDDIR)
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93
mainboard/amd/norwich/initram.c
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mainboard/amd/norwich/initram.c
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@ -0,0 +1,93 @@
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/*
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* This file is part of the LinuxBIOS project.
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*
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* Copyright (C) 2007 Advanced Micro Devices, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <types.h>
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#include <lib.h>
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#include <console.h>
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#include <post_code.h>
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#include <device/device.h>
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#include <device/pci.h>
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#include <string.h>
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#include <msr.h>
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#include <amd_geodelx.h>
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#include <southbridge/amd/cs5536/cs5536.h>
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#include <northbridge/amd/geodelx/raminit.h>
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#define MANUALCONF 0 /* Do automatic strapped PLL config */
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#define PLLMSRHI 0x00001490 /* manual settings for the PLL */
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#define PLLMSRLO 0x02000030
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#define DIMM0 ((u8) 0xA0)
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#define DIMM1 ((u8) 0xA2)
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/**
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* Place holder in case we ever need it. Since this file is a
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* template for other motherboards, we want this here and we want the
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* call in the right place.
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*/
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static void mb_gpio_init(void)
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{
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/* Early mainboard specific GPIO setup */
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}
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/**
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* main for initram for the amd norwich. It might seem that you
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* could somehow do these functions in, e.g., the cpu code, but the
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* order of operations and what those operations are is VERY strongly
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* mainboard dependent. It's best to leave it in the mainboard code.
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*/
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int main(void)
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{
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u8 smb_devices[] = {
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DIMM0, DIMM1
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};
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post_code(POST_START_OF_MAIN);
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system_preinit();
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geodelx_msr_init();
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cs5536_early_setup();
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/* NOTE: must do this AFTER the early_setup!
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* it is counting on some early MSR setup
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* for cs5536.
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*/
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/* We do this early for debug.
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* real setup should done in chipset init via config.lb
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*/
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cs5536_setup_onchipuart();
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mb_gpio_init();
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uart_init();
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console_init();
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pll_reset(MANUALCONF, PLLMSRHI, PLLMSRLO);
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cpu_reg_init(0, DIMM0, DIMM1);
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sdram_set_registers();
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sdram_set_spd_registers(DIMM0, DIMM1);
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sdram_enable(DIMM0, DIMM1);
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/* Check low memory */
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/*ram_check(0x00000000, 640*1024); */
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return 0;
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}
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@ -441,4 +441,17 @@
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#define FLASH_IO_128B 0x0000FF80
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#define FLASH_IO_256B 0x0000FF00
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/* function prototypes */
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void cs5536_setup_extmsr(void);
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void cs5536_setup_idsel(void);
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void cs5536_usb_swapsif(void);
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void cs5536_setup_iobase(void);
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void cs5536_setup_power_button(void);
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void cs5536_setup_smbus_gpio(void);
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void cs5536_disable_internal_uart(void);
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void cs5536_setup_cis_mode(void);
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void cs5536_setup_onchipuart(void);
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void cs5536_early_setup(void);
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#endif /* SOUTHBRIDGE_AMD_CS5536_CS5536_H */
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