From e15c97c56c6bb5cc7c4c9a081276ee03696fe97e Mon Sep 17 00:00:00 2001 From: Sean Rhodes Date: Tue, 21 Jan 2025 15:41:02 +0000 Subject: [PATCH] soc/intel/meteorlake: Move CNVi control out of chipset.cb Not every board will use CNVi, so move this out of the chipset.cb and into devicetree. Change-Id: Ie12e828b2f0a65e46a526746bc06af288270d0d1 Signed-off-by: Sean Rhodes Reviewed-on: https://review.coreboot.org/c/coreboot/+/86088 Tested-by: build bot (Jenkins) Reviewed-by: Matt DeVillier --- src/mainboard/google/rex/variants/baseboard/ovis/devicetree.cb | 2 ++ src/mainboard/google/rex/variants/baseboard/rex/devicetree.cb | 2 ++ .../intel/mtlrvp/variants/baseboard/mtlrvp_p/devicetree.cb | 2 ++ src/mainboard/system76/mtl/devicetree.cb | 1 + src/soc/intel/meteorlake/chipset.cb | 3 --- 5 files changed, 7 insertions(+), 3 deletions(-) diff --git a/src/mainboard/google/rex/variants/baseboard/ovis/devicetree.cb b/src/mainboard/google/rex/variants/baseboard/ovis/devicetree.cb index bdebde5989..19eb34e21f 100644 --- a/src/mainboard/google/rex/variants/baseboard/ovis/devicetree.cb +++ b/src/mainboard/google/rex/variants/baseboard/ovis/devicetree.cb @@ -1,4 +1,6 @@ chip soc/intel/meteorlake + # Enable CNVi WiFi + register "cnvi_wifi_core" = "true" # GPE configuration register "pmc_gpe0_dw0" = "GPP_D" diff --git a/src/mainboard/google/rex/variants/baseboard/rex/devicetree.cb b/src/mainboard/google/rex/variants/baseboard/rex/devicetree.cb index 55de7d2906..04b7cf69de 100644 --- a/src/mainboard/google/rex/variants/baseboard/rex/devicetree.cb +++ b/src/mainboard/google/rex/variants/baseboard/rex/devicetree.cb @@ -1,4 +1,6 @@ chip soc/intel/meteorlake + # Enable CNVi WiFi + register "cnvi_wifi_core" = "true" # GPE configuration register "pmc_gpe0_dw0" = "GPP_B" diff --git a/src/mainboard/intel/mtlrvp/variants/baseboard/mtlrvp_p/devicetree.cb b/src/mainboard/intel/mtlrvp/variants/baseboard/mtlrvp_p/devicetree.cb index 45c8f0bae2..d4f2ea3fcc 100644 --- a/src/mainboard/intel/mtlrvp/variants/baseboard/mtlrvp_p/devicetree.cb +++ b/src/mainboard/intel/mtlrvp/variants/baseboard/mtlrvp_p/devicetree.cb @@ -9,6 +9,8 @@ fw_config end chip soc/intel/meteorlake + # Enable CNVi WiFi + register "cnvi_wifi_core" = "true" # GPE configuration register "pmc_gpe0_dw0" = "GPP_B" diff --git a/src/mainboard/system76/mtl/devicetree.cb b/src/mainboard/system76/mtl/devicetree.cb index 0e1eaac13e..899788d4c6 100644 --- a/src/mainboard/system76/mtl/devicetree.cb +++ b/src/mainboard/system76/mtl/devicetree.cb @@ -34,6 +34,7 @@ chip soc/intel/meteorlake device ref ioe_shared_sram on end device ref pmc_shared_sram on end device ref cnvi_wifi on + register "cnvi_wifi_core" = "true" register "cnvi_bt_core" = "true" register "cnvi_bt_audio_offload" = "true" chip drivers/wifi/generic diff --git a/src/soc/intel/meteorlake/chipset.cb b/src/soc/intel/meteorlake/chipset.cb index 865b3d0af7..9087dd8adb 100644 --- a/src/soc/intel/meteorlake/chipset.cb +++ b/src/soc/intel/meteorlake/chipset.cb @@ -29,9 +29,6 @@ chip soc/intel/meteorlake # Temporary setting TCC of 90C = Tj max (110) - TCC_Offset (20) register "tcc_offset" = "20" - # Enable CNVi WiFi - register "cnvi_wifi_core" = "true" - device domain 0 on device pci 00.0 alias system_agent on end device pci 01.0 alias pcie_rp12 off end