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broadwell: Clean up serialio init code

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- Fix header includes
- Use correct chip config structure
- Use the device_nvs structure in ACPI GNVS region

BUG=chrome-os-partner:28234
TEST=None

Change-Id: I6c7131850fd97b865d88ef53116b09e3e239fc78
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/199405
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Duncan Laurie 2014-05-02 15:05:41 -07:00 • committed by chrome-internal-fetch
commit e09a1f8520
1 changed files with 10 additions and 6 deletions
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16
src/soc/intel/broadwell/serialio.c
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@ -25,10 +25,14 @@
#include <device/pciexp.h>
#include <device/pci_ids.h>
#include <stdlib.h>
#include "pch.h"
#include "nvs.h"
#include <broadwell/iobp.h>
#include <broadwell/nvs.h>
#include <broadwell/pch.h>
#include <broadwell/ramstage.h>
#include <broadwell/rcba.h>
#include <broadwell/serialio.h>
#include <chip.h>
/* Set D3Hot Power State in ACPI mode */
static void serialio_enable_d3hot(struct device *dev)
{
@ -156,7 +160,7 @@ static void serialio_init_once(int acpi_mode)
static void serialio_init(struct device *dev)
{
struct southbridge_intel_lynxpoint_config *config = dev->chip_info;
config_t *config = dev->chip_info;
struct resource *bar0, *bar1;
int sio_index = -1;
u32 reg32;
@ -246,8 +250,8 @@ static void serialio_init(struct device *dev)
}
/* Save BAR0 and BAR1 to ACPI NVS */
gnvs->s0b[sio_index] = (u32)bar0->base;
gnvs->s1b[sio_index] = (u32)bar1->base;
gnvs->dev.bar0[sio_index] = (u32)bar0->base;
gnvs->dev.bar1[sio_index] = (u32)bar1->base;
}
}