From e04be37806dcf6494c876c278f7fd3da60b1242c Mon Sep 17 00:00:00 2001 From: Felix Held Date: Wed, 2 Feb 2022 22:54:05 +0100 Subject: [PATCH] mb/amd/chausie/devicetree: update I2C RX levels to match board design Signed-off-by: Felix Held Change-Id: Ie5d5f5441132e5b0d8991d07d4dde994fc17ab64 Reviewed-on: https://review.coreboot.org/c/coreboot/+/61569 Tested-by: build bot (Jenkins) Reviewed-by: Raul Rangel --- src/mainboard/amd/chausie/devicetree.cb | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/src/mainboard/amd/chausie/devicetree.cb b/src/mainboard/amd/chausie/devicetree.cb index 6067b18ebf..8cc23e1d50 100644 --- a/src/mainboard/amd/chausie/devicetree.cb +++ b/src/mainboard/amd/chausie/devicetree.cb @@ -14,10 +14,10 @@ chip soc/amd/sabrina }" # I2C Pad Control RX Select Configuration - register "i2c_pad[0].rx_level" = "I2C_PAD_RX_3_3V" - register "i2c_pad[1].rx_level" = "I2C_PAD_RX_3_3V" - register "i2c_pad[2].rx_level" = "I2C_PAD_RX_3_3V" - register "i2c_pad[3].rx_level" = "I2C_PAD_RX_3_3V" + register "i2c_pad[0].rx_level" = "I2C_PAD_RX_1_8V" + register "i2c_pad[1].rx_level" = "I2C_PAD_RX_1_8V" + register "i2c_pad[2].rx_level" = "I2C_PAD_RX_1_8V" + register "i2c_pad[3].rx_level" = "I2C_PAD_RX_1_8V" register "s0ix_enable" = "true"