mainboard/google/fatcat: Update SoC to Panther Lake

This commit updates the fatcat mainboard to use the Panther Lake SoC
instead of Meteor Lake.

The changes include:

- Selecting the `SOC_INTEL_PANTHERLAKE_U_H` config option.
- Updating the `mainboard_update_soc_chip_config()` function to use the
  `soc_intel_pantherlake_config` struct.
- Updating the devicetree to use the `soc/intel/pantherlake` chip.
- Updating variant header files to reflect the SoC change.

This update enables support for the Panther Lake SoC and its
features on the fatcat mainboard.

BUG=b:347669091
TEST=Able to build google/fatcat.

Change-Id: Ie0c6257dfb9dd1f627472ad220614f9b24c911ef
Signed-off-by: Subrata Banik <subratabanik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84537
Reviewed-by: Pranava Y N <pranavayn@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Subrata Banik 2024-09-24 09:47:03 +00:00
commit e047687a56
4 changed files with 5 additions and 5 deletions

View file

@ -20,6 +20,7 @@ config BOARD_GOOGLE_FATCAT_COMMON
select SOC_INTEL_CSE_LITE_SKU
select SOC_INTEL_CSE_PRE_CPU_RESET_TELEMETRY_V2
select SOC_INTEL_CSE_SEND_EOP_ASYNC
select SOC_INTEL_PANTHERLAKE_U_H
config BOARD_GOOGLE_BASEBOARD_FATCAT
def_bool n
@ -28,7 +29,6 @@ config BOARD_GOOGLE_BASEBOARD_FATCAT
select MAINBOARD_HAS_CHROMEOS
select MEMORY_SOLDERDOWN
select SOC_INTEL_IOE_DIE_SUPPORT
select SOC_INTEL_METEORLAKE_U_H
select SYSTEM_TYPE_LAPTOP
select TPM_GOOGLE_TI50

View file

@ -16,12 +16,12 @@ void __weak fw_config_gpio_padbased_override(struct pad_config *padbased_table)
/* default implementation does nothing */
}
void mainboard_update_soc_chip_config(struct soc_intel_meteorlake_config *config)
void mainboard_update_soc_chip_config(struct soc_intel_pantherlake_config *config)
{
variant_update_soc_chip_config(config);
}
__weak void variant_update_soc_chip_config(struct soc_intel_meteorlake_config *config)
__weak void variant_update_soc_chip_config(struct soc_intel_pantherlake_config *config)
{
/* default implementation does nothing */
}

View file

@ -1,3 +1,3 @@
chip soc/intel/meteorlake
chip soc/intel/pantherlake
device domain 0 on end
end

View file

@ -22,7 +22,7 @@ const struct mb_cfg *variant_memory_params(void);
void variant_get_spd_info(struct mem_spd *spd_info);
int variant_memory_sku(void);
bool variant_is_half_populated(void);
void variant_update_soc_chip_config(struct soc_intel_meteorlake_config *config);
void variant_update_soc_chip_config(struct soc_intel_pantherlake_config *config);
/* Get soc power limit config struct for current CPU sku */
struct soc_power_limits_config *variant_get_soc_power_limit_config(void);