mb/asus/p8x7x-series: Enable single PS/2 port role control

Add HAVE_SHARED_PS2_PORT Kconfig, associated cmos.[layout,default]
and CFR entries to p8z77-m[_pro], p8z77-v[_le_plus], p8h77-v,
where their owners manual indicate a single shared PS/2 port, to enable
control of this one port's role. Adds an "auto" option if PS/2 keyboard
init is enabled in Kconfig, to enable switching role automatically if
a device (ie. mouse) is detected on auxiliary channel.

TEST=Logitech M-S48 PS/2 mouse and various PS/2 keyboards all work with
correctly set port role and "auto" on asus/p8z77-m under a Linux
Mint 22.2 live environment.

Change-Id: I21b73da99168e751b1a23485d4b1695963f9eef5
Signed-off-by: Keith Hui <buurin@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/81885
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Keith Hui 2024-04-12 22:17:28 -04:00 committed by Matt DeVillier
commit df470521a7
12 changed files with 61 additions and 1 deletions

View file

@ -26,6 +26,7 @@ config BOARD_ASUS_P8H77_V
select SUPERIO_NUVOTON_NCT6779D
select USE_NATIVE_RAMINIT
select POWER_LED_USES_GPIO8
select HAVE_SHARED_PS2_PORT
config BOARD_ASUS_P8Z77_M_PRO
select BOARD_ASUS_P8X7X_SERIES
@ -34,6 +35,7 @@ config BOARD_ASUS_P8Z77_M_PRO
select MEMORY_MAPPED_TPM
select SUPERIO_NUVOTON_NCT6779D
select SUPERIO_NUVOTON_COMMON_COM_A
select HAVE_SHARED_PS2_PORT
config BOARD_ASUS_P8Z77_V_LX2
select BOARD_ASUS_P8X7X_SERIES
@ -51,6 +53,7 @@ config BOARD_ASUS_P8Z77_V
select MAINBOARD_USES_IFD_GBE_REGION
select SUPERIO_NUVOTON_NCT6779D
select USE_NATIVE_RAMINIT
select HAVE_SHARED_PS2_PORT
config BOARD_ASUS_P8Z77_M
select BOARD_ASUS_P8X7X_SERIES
@ -58,6 +61,7 @@ config BOARD_ASUS_P8Z77_M
select MEMORY_MAPPED_TPM
select SUPERIO_NUVOTON_NCT6779D
select SUPERIO_NUVOTON_COMMON_COM_A
select HAVE_SHARED_PS2_PORT
config BOARD_ASUS_P8Z77_V_LE_PLUS
select BOARD_ASUS_P8X7X_SERIES

View file

@ -5,6 +5,7 @@
#include <console/cfr.h>
#include <northbridge/intel/sandybridge/cfr.h>
#include <southbridge/intel/bd82x6x/cfr.h>
#include <superio/nuvoton/common/nuvoton.h>
#if CONFIG(USE_NATIVE_RAMINIT)
static struct sm_obj_form sysagent = {
@ -74,6 +75,20 @@ static const struct sm_object spdif_dest = SM_DECLARE_ENUM({
SM_ENUM_VALUE_END },
});
#endif
#if CONFIG(HAVE_SHARED_PS2_PORT)
static const struct sm_object ps2_port_role = SM_DECLARE_ENUM({
.opt_name = "ps2_port_role",
.ui_name = "PS/2 Port Role",
.default_value = 0,
.values = (const struct sm_enum_value[]) {
{ "Keyboard", PS2_PORT_ROLE_KEYBOARD },
{ "Mouse", PS2_PORT_ROLE_MOUSE },
#if CONFIG(DRIVERS_PS2_KEYBOARD)
{ "Auto", PS2_PORT_ROLE_AUTO },
#endif
SM_ENUM_VALUE_END },
});
#endif
static struct sm_obj_form onboard_devices = {
.ui_name = "Onboard Devices Configuration",
@ -82,6 +97,9 @@ static struct sm_obj_form onboard_devices = {
&audio_panel_type,
#if CONFIG(BOARD_ASUS_P8Z77_V_LE_PLUS)
&spdif_dest,
#endif
#if CONFIG(HAVE_SHARED_PS2_PORT)
&ps2_port_role,
#endif
NULL
},

View file

@ -6,3 +6,4 @@ nmi=Disable
power_on_after_fail=Disable
sata_mode=AHCI
gfx_uma_size=64M
ps2_port_role=Keyboard

View file

@ -24,6 +24,8 @@ entries
# coreboot config options: northbridge
416 5 e 6 gfx_uma_size
426 2 e 7 ps2_port_role
# coreboot config options: check sums
984 16 h 0 check_sum
@ -79,6 +81,11 @@ enumerations
6 14 480M
6 15 512M
# ps2_port_role
7 0 Keyboard
7 1 Mouse
7 2 Auto
# -----------------------------------------------------------------
checksums

View file

@ -10,3 +10,4 @@ usb3_mode=Enable
usb3_drv=Enable
usb3_streams=Enable
audio_panel_type=HDA
ps2_port_role=Keyboard

View file

@ -55,6 +55,7 @@ entries
# HD Audio or AC'97
#
425 1 e 9 audio_panel_type
426 2 e 10 ps2_port_role
# -----------------------------------------------------------------
# Sandy/Ivy Bridge MRC Scrambler Seed values
@ -119,6 +120,11 @@ enumerations
7 14 480M
7 15 512M
# ps2_port_role
10 0 Keyboard
10 1 Mouse
10 2 Auto
# usb3_mode
# Disable = Use the port always as USB 2.0 for compatibility
# Enable = Use the port always as USB 3.0 for speed

View file

@ -9,3 +9,4 @@ sata_mode=AHCI
usb3_mode=Enable
usb3_drv=Enable
usb3_streams=Enable
ps2_port_role=Keyboard

View file

@ -52,6 +52,8 @@ entries
#
424 1 e 1 usb3_streams
426 2 e 10 ps2_port_role
# -----------------------------------------------------------------
# Sandy/Ivy Bridge MRC Scrambler Seed values
# note: MUST NOT be covered by checksum!
@ -114,6 +116,11 @@ enumerations
7 14 480M
7 15 512M
# ps2_port_role
10 0 Keyboard
10 1 Mouse
10 2 Auto
# usb3_mode
# Disable = Use the port always as USB 2.0 for compatibility
# Enable = Use the port always as USB 3.0 for speed

View file

@ -6,3 +6,4 @@ nmi=Disable
power_on_after_fail=Disable
sata_mode=AHCI
gfx_uma_size=64M
ps2_port_role=Keyboard

View file

@ -24,6 +24,8 @@ entries
# coreboot config options: northbridge
416 5 e 6 gfx_uma_size
428 1 e 12 ps2_port_role
# coreboot config options: check sums
984 16 h 0 check_sum
@ -79,7 +81,12 @@ enumerations
6 14 480M
6 15 512M
# ps2_port_role
12 0 Keyboard
12 1 Mouse
12 2 Auto
# -----------------------------------------------------------------
checksums
checksum 392 423 984
checksum 392 431 984

View file

@ -10,3 +10,4 @@ gfx_uma_size=64M
audio_panel_type=HDA
spdif_dest=SPDIF_OUT
pciex16_3_bandwidth=x2
ps2_port_role=Keyboard

View file

@ -28,6 +28,7 @@ entries
425 1 e 9 audio_panel_type
426 1 e 10 spdif_dest
427 1 e 11 pciex16_3_bandwidth
428 1 e 12 ps2_port_role
# coreboot config options: check sums
984 16 h 0 check_sum
@ -95,6 +96,11 @@ enumerations
11 0 x2
11 1 x4
# ps2_port_role
12 0 Keyboard
12 1 Mouse
12 2 Auto
# -----------------------------------------------------------------
checksums