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soc/intel: Extend CSE RW Update and ME read access for payload sync

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Modify the dependencies for `SOC_INTEL_CSE_RW_UPDATE` and
`ME_REGION_ALLOW_CPU_READ_ACCESS` config options to include
`SOC_INTEL_CSE_LITE_SYNC_BY_PAYLOAD`.

This allows these features to be enabled even when CSE sync is performed
in the payload, not just within coreboot (when `SOC_INTEL_CSE_LITE_SKU`
config is enabled).

BUG=b:305898363
TEST=Builds and boots successfully:
    * google/rex0 with SOC_INTEL_CSE_LITE_SKU
    * google/rex64 with SOC_INTEL_CSE_LITE_SYNC_BY_PAYLOAD

Change-Id: Id6ec19d74237f278e8383c89923523871b2cc2db
Signed-off-by: Subrata Banik <subratabanik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83395
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
This commit is contained in:
Subrata Banik 2024-07-09 23:18:18 +05:30
commit df052ff30e
2 changed files with 2 additions and 2 deletions
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2
src/soc/intel/common/block/cse/Kconfig
View file

@ -184,7 +184,7 @@ config SOC_INTEL_CSE_SERVER_SKU
config SOC_INTEL_CSE_RW_UPDATE
bool "Enable the CSE RW Update Feature"
default n
depends on SOC_INTEL_CSE_LITE_SKU
depends on SOC_INTEL_CSE_LITE_SKU || SOC_INTEL_CSE_LITE_SYNC_BY_PAYLOAD
help
This config will enable CSE RW firmware update feature and also will be used ensure
all the required configs are provided by mainboard.

2
src/southbridge/intel/common/firmware/Kconfig
View file

@ -67,7 +67,7 @@ config CHECK_ME
config ME_REGION_ALLOW_CPU_READ_ACCESS
bool "Allows HOST/CPU read access to ME region"
depends on HAVE_IFD_BIN
default y if SOC_INTEL_CSE_LITE_SKU
default y if SOC_INTEL_CSE_LITE_SKU || SOC_INTEL_CSE_LITE_SYNC_BY_PAYLOAD
default n
help
The config ensures Host has read access to the ME region if it is locked