mb/google/brya/var/uldrenite: Enable ISH

Re-enable the ISH for uldrenite and set the correct firmware name. ISH
was disabled on uldrenite due to a suspend issue that's no longer
there. Uldrenite PoR is to use the ISH. The issue was caused by a bug
in Intel's Zephyr HAL which included power management logic that
incorrectly handled one of the interrupts.

BUG=b:410645679
TEST=ISH device under lscpi.

# lspci -s 00:12.0 -knn
00:12.0 Serial controller [0700]: Intel Corporation Device [8086:54fc]
        Subsystem: Intel Corporation Device [8086:7270]
        Kernel driver in use: intel_ish_ipc
        Kernel modules: intel_ish_ipc


Change-Id: I567fd43857da0023d063c0bb1b70c206dbee47f4
Signed-off-by: Yuval Peress <peress@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87313
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Eric Lai <ericllai@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
This commit is contained in:
Yuval Peress 2025-04-15 04:22:00 +00:00 committed by Subrata Banik
commit deda4ee304
2 changed files with 10 additions and 5 deletions

View file

@ -61,10 +61,10 @@ static const struct pad_config gpio_table[] = {
PAD_CFG_GPI_IRQ_WAKE(GPP_B3, NONE, PWROK, LEVEL, INVERT),
/* B4 : PROC_GP3 ==> EN_PP3300_UCAM_X */
PAD_CFG_GPO_LOCK(GPP_B4, 1, LOCK_CONFIG),
/* B5 : GPP_B5 ==> NC */
PAD_NC(GPP_B5, NONE),
/* B6 : GPP_B6 ==> NC */
PAD_NC(GPP_B6, NONE),
/* B5 : GPP_B5 ==> ISH_I2C0_SCL */
PAD_CFG_NF_IOSTANDBY_IGNORE(GPP_B5, NONE, DEEP, NF1),
/* B6 : GPP_B6 ==> ISH_I2C0_SDA */
PAD_CFG_NF_IOSTANDBY_IGNORE(GPP_B6, NONE, DEEP, NF1),
/* B7 : GPP_B7 ==> NC */
PAD_NC_LOCK(GPP_B7, NONE, LOCK_CONFIG),
/* B8 : GPP_B8 ==> NC */

View file

@ -486,7 +486,12 @@ chip soc/intel/alderlake
end
probe DB_CELLULAR CELLULAR_RW350R
end # PCIE2 WWAN card
device ref ish off end
device ref ish on
chip drivers/intel/ish
register "firmware_name" = ""uldrenite_ish.bin""
device generic 0 on end
end
end
device ref shared_sram on end
device ref heci1 on end
device ref pmc hidden end