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This is just correcting the license headers and providing attribution.

Browse source 
This correction was made by looking at the v2 code base. 

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@257 f3766cd6-281f-0410-b1cd-43a5c92072e9
This commit is contained in:
Ronald G. Minnich 2007-03-13 00:20:22 +00:00
commit de4dffdbe5
2 changed files with 12 additions and 3 deletions
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8
southbridge/intel/i82371eb/config.h
View file

@ -1,7 +1,9 @@
/*
* This file is part of the LinuxBIOS project.
*
* Copyright (C) 2007 Ronald G. Minnich <rminnich@gmail.com>
* Copyright (C) 2004 Linux Networx
* Copyright (C) 2005 Bitworks
* Copyright (C) 2007 Ronald G. Minnich
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -21,5 +23,7 @@
extern struct constructor i82371eb_constructors[];
struct southbridge_intel_i82371eb_config {
int ide;
unsigned int ide0_enable : 1;
unsigned int ide1_enable : 1;
};

7
southbridge/intel/i82371eb/i82371eb.c
View file

@ -1,7 +1,9 @@
/*
* This file is part of the LinuxBIOS project.
*
* Copyright (C) 2007 Ronald G. Minnich <rminnich@gmail.com>
* Copyright (C) 2004 Linux Networx
* Copyright (C) 2005 Bitworks
* Copyright (C) 2007 Ronald G. Minnich
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -28,6 +30,9 @@
// #include "i82371eb.h"
/* The plain PCI device uses the standard PCI operations. */
/* TODO: bring in the rest of the v2 code for controlling IDE enable.
* This is just placeholder code for now
*/
/* Note that this structure is not necessary (yet),
* but is here as an example of how you can set up your own ops.