From de2923b5903da10876c92142afc25416d5914a3b Mon Sep 17 00:00:00 2001 From: "Ronald G. Minnich" Date: Thu, 15 Feb 2001 15:25:06 +0000 Subject: [PATCH] mainboard for irobot.com --- src/mainboard/irobot/proto1/Config | 18 ++ src/mainboard/irobot/proto1/irq_tables.c | 193 ++++++++++++++++++ src/mainboard/irobot/proto1/mainboard.c | 139 +++++++++++++ src/mainboard/irobot/proto1/mtrr_table.c | 47 +++++ .../irobot/proto1/proto1.config.example | 25 +++ 5 files changed, 422 insertions(+) create mode 100644 src/mainboard/irobot/proto1/Config create mode 100644 src/mainboard/irobot/proto1/irq_tables.c create mode 100644 src/mainboard/irobot/proto1/mainboard.c create mode 100644 src/mainboard/irobot/proto1/mtrr_table.c create mode 100644 src/mainboard/irobot/proto1/proto1.config.example diff --git a/src/mainboard/irobot/proto1/Config b/src/mainboard/irobot/proto1/Config new file mode 100644 index 0000000000..85f4dcddd0 --- /dev/null +++ b/src/mainboard/irobot/proto1/Config @@ -0,0 +1,18 @@ +northbridge intel/440bx +southbridge intel/piix4e + +superio SMC/fdc37n769 +option SMC_BASE=0x370 + +option ENABLE_FIXED_AND_VARIABLE_MTRRS +option HAVE_PIRQ_TABLE +option HAVE_MTRR_TABLE +option PIIX4_DEVFN=0x38 +option MAINBOARD_FIXUP_IN_CHARGE + +object mainboard.o +object irq_tables.o +object mtrr_table.o + +cpu p5 +cpu p6 diff --git a/src/mainboard/irobot/proto1/irq_tables.c b/src/mainboard/irobot/proto1/irq_tables.c new file mode 100644 index 0000000000..8bc8b1f2c6 --- /dev/null +++ b/src/mainboard/irobot/proto1/irq_tables.c @@ -0,0 +1,193 @@ +/* + +modified by mikec@ciholas.com for the PROTO1 packbot development +board. + +Need to define PIIX4_DEVFN=0x38 as compile time flag + +*/ + +#include + +/* + * This table must be located between 0x000f0000 and 0x000fffff. + * By defining it as a const it gets located in the code segment + * and therefore inside the necessary 64K block. -tds + */ + +#define USB_DEVFN (PIIX4_DEVFN+2) +#define SUM_REST 0x0b +#define CHECKSUM (0x00-(SUM_REST+PIIX4_DEVFN+USB_DEVFN)) + +/* + * This table should work for most systems using the PIIX4 + * southbridge that have 4 PCI slots. + * + * I recall that the 440GX board that Ron was using had + * the PIIX4 at a different location. This will effect the + * devfn of the router and USB controller as well as the + * checksum. Hopefully the defines will allow this to + * be a bit more portable. + * -tds + */ + +const struct irq_routing_table intel_irq_routing_table = { + PIRQ_SIGNATURE, /* u32 signature */ + PIRQ_VERSION, /* u16 version */ + 32+16*6, /* u16 size - size of entire table struct */ + 0, /* u8 rtr_bus - router bus */ + PIIX4_DEVFN, /* u8 rtr_devfn - router devfn */ + 0x1e00, /* u16 exclusive_irqs - mask of IRQs for PCI use */ + 0x8086, /* u16 rtr_vendor - router vendor id */ + 0x7110, /* u16 rtr_devfn - router device id */ + 0, /* u8 miniport_data - "crap" */ + { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */ + CHECKSUM, /* u8 checksum - mod 256 checksum must give zero */ + /* struct irq_info slots[0] */ + { + { + 0, /* u8 bus */ + USB_DEVFN, /* u8 devfn for USB controller */ + { + { + 0x00, /* u8 link - IRQ line ID */ + 0x0000, /* u16 bitmap - Available IRQs */ + }, + { + 0x00, /* u8 link - IRQ line ID */ + 0x0000, /* u16 bitmap - Available IRQs */ + }, + { + 0x00, /* u8 link - IRQ line ID */ + 0x0000, /* u16 bitmap - Available IRQs */ + }, + { + 0x63, /* u8 link - IRQ line ID */ + 0xdef8, /* u16 bitmap - Available IRQs */ + } + }, + 0, /* u8 slot */ + 0, /* u8 rfu */ + }, + { + 0, /* u8 bus */ + 0x78, /* u8 devfn BT878 (U43), IDSEL=AD26, INTA */ + { + { + 0x60, /* u8 link - IRQ line ID */ + 0xdef8, /* u16 bitmap - Available IRQs */ + }, + { + 0x00, /* u8 link - IRQ line ID */ + 0x0000, /* u16 bitmap - Available IRQs */ + }, + { + 0x00, /* u8 link - IRQ line ID */ + 0x0000, /* u16 bitmap - Available IRQs */ + }, + { + 0x00, /* u8 link - IRQ line ID */ + 0x0000, /* u16 bitmap - Available IRQs */ + } + }, + 0, /* u8 slot */ + 0, /* u8 rfu */ + }, + { + 0, /* u8 bus */ + 0x80, /* u8 devfn BT878 (U42), IDSEL=AD27, INTB */ + { + { + 0x61, /* u8 link - IRQ line ID */ + 0xdef8, /* u16 bitmap - Available IRQs */ + }, + { + 0x00, /* u8 link - IRQ line ID */ + 0x0000, /* u16 bitmap - Available IRQs */ + }, + { + 0x00, /* u8 link - IRQ line ID */ + 0x0000, /* u16 bitmap - Available IRQs */ + }, + { + 0x00, /* u8 link - IRQ line ID */ + 0x0000, /* u16 bitmap - Available IRQs */ + } + }, + 0, /* u8 slot */ + 0, /* u8 rfu */ + }, + { + 0, /* u8 bus */ + 0x88, /* u8 devfn PCI1225 PCMCIA, IDSEL=AD28, INTC */ + { + { + 0x62, /* u8 link - IRQ line ID */ + 0xdef8, /* u16 bitmap - Available IRQs */ + }, + { + 0x62, /* u8 link - IRQ line ID */ + 0xdef8, /* u16 bitmap - Available IRQs */ + }, + { + 0x00, /* u8 link - IRQ line ID */ + 0x0000, /* u16 bitmap - Available IRQs */ + }, + { + 0x00, /* u8 link - IRQ line ID */ + 0x0000, /* u16 bitmap - Available IRQs */ + } + }, + 0, /* u8 slot */ + 0, /* u8 rfu */ + }, + { + 0, /* u8 bus */ + 0x90, /* u8 devfn 82559 Ethernet, IDSEL=AD29, INTD */ + { + { + 0x63, /* u8 link - IRQ line ID */ + 0xdef8, /* u16 bitmap - Available IRQs */ + }, + { + 0x00, /* u8 link - IRQ line ID */ + 0x0000, /* u16 bitmap - Available IRQs */ + }, + { + 0x00, /* u8 link - IRQ line ID */ + 0x0000, /* u16 bitmap - Available IRQs */ + }, + { + 0x00, /* u8 link - IRQ line ID */ + 0x0000, /* u16 bitmap - Available IRQs */ + } + }, + 0, /* u8 slot */ + 0, /* u8 rfu */ + }, + { + 0, /* u8 bus */ + 0x98, /* u8 devfn PCI slot, IDSEL=AD30, INTA */ + { + { + 0x60, /* u8 link - IRQ line ID */ + 0xdef8, /* u16 bitmap - Available IRQs */ + }, + { + 0x61, /* u8 link - IRQ line ID */ + 0xdef8, /* u16 bitmap - Available IRQs */ + }, + { + 0x62, /* u8 link - IRQ line ID */ + 0xdef8, /* u16 bitmap - Available IRQs */ + }, + { + 0x63, /* u8 link - IRQ line ID */ + 0xdef8, /* u16 bitmap - Available IRQs */ + } + }, + 1, /* u8 slot */ + 0, /* u8 rfu */ + } + } +}; diff --git a/src/mainboard/irobot/proto1/mainboard.c b/src/mainboard/irobot/proto1/mainboard.c new file mode 100644 index 0000000000..905907ddfe --- /dev/null +++ b/src/mainboard/irobot/proto1/mainboard.c @@ -0,0 +1,139 @@ +#include +#include + +#include + +/* #include "SMC_SuperIO.h" */ +#ifndef _SMC_SUPER_IO_H_ +#define _SMC_SUPER_IO_H_ + +#define SMC_PP_MODE_SPP 0x00 +#define SMC_PP_MODE_EPP_SPP 0x01 +#define SMC_PP_MODE_ECP 0x02 +#define SMC_PP_MODE_EPP_ECP 0x03 + +int smc_uart_setup(int smc_addr, + int addr1, int irq1, + int addr2, int irq2); + +int smc_pp_setup(int smc_addr, int pp_addr, int mode); + +int smc_validbit(int smc_addr, int valid); + +#endif /* _SMC_SUPER_IO_H_ */ + +void mainboard_fixup() { + int rv; + struct pci_dev *pcidev; + unsigned long val; + + nvram_on(); + + intel_display_cpuid(); + intel_mtrr_check(); + + intel_zero_irq_settings(); + intel_check_irq_routing_table(); + intel_interrupts_on(); + + rv = 0; + + /* + * Select EPP to enable IRQ sharing between chips + */ +#if 0 /* does not seem to work */ + rv |= smc_pp_setup(0x370, 0x378, SMC_PP_MODE_EPP_SPP); + rv |= smc_pp_setup(0x3f0, 0x380, SMC_PP_MODE_EPP_SPP); +#endif + /* + * Enable and config all the serial ports + */ + + rv |= smc_uart_setup(0x370, 0x3f8, 4, 0x2f8, 4); + rv |= smc_uart_setup(0x3f0, 0x3e8, 3, 0x2e8, 3); + + /* + * Set the valid bit to enable the devices + */ + + rv |= smc_validbit(0x370, 1); + rv |= smc_validbit(0x3f0, 1); + + /* return(rv); */ + + /* ti_pci1225_setup(); */ + + // Enable GPI10, disable LID + + pcidev = pci_find_device(0x8086, 0x7110, (void *)NULL); + if (pcidev) { + pci_read_config_dword(pcidev, 0xb0, &val); + pci_write_config_dword(pcidev, 0xb0, val | 0x02000000); + } + + // Map power stuff to I/O 0x4000 + + pcidev = pci_find_device(0x8086, 0x7113, (void *)NULL); + if (pcidev) { + pci_write_config_dword(pcidev, 0x40, 0x00004001); + pci_write_config_byte(pcidev, 0x80, 0x01); + } + + return; +} + +/* 1Meg - 64K = 960K = 0xf0000 */ + +#define INITRD_SIZE 0xf0000 + +void +loader_setup(unsigned long base, + unsigned long totalram, + unsigned long *initrd_start, + unsigned long *initrd_size, + unsigned char **cmd_line, + unsigned char **zkernel_start, + unsigned long *zkernel_mask) +{ + unsigned char button; + unsigned char gpo0; + + button = !(inb(0x4031) & 0x04); + + PRINTK(KERN_INFO "LID button is - %s\n", (button ? "closed" : "open")); + + if (button) { + *cmd_line = "root=/dev/ram0 console=ttyS0,115200"; + *initrd_start = (totalram*1024 - INITRD_SIZE - 0x100000 -1) & 0xffff0000; + *initrd_size = INITRD_SIZE; + *zkernel_start = (unsigned char *)0xfff00000; + *zkernel_mask = 0x0000ffff; + + /* here we load the initrd image */ + + /* flip to other flash page */ + + gpo0 = inb(0x4034); + PRINTK(KERN_INFO "GPO[0] : 0x%02x\n", gpo0); + gpo0 &= ~0x01; + outb(gpo0, 0x4034); + + { + int ii; + + for (ii = 0; ii<16; ii++) { + PRINTK(KERN_INFO "[%02x] ", *(unsigned char *)(0xfff00000+ii)); + } + + PRINTK(KERN_INFO "\n"); + } + + memcpy((void *)(*initrd_start), (void *)(0xfff00000), *initrd_size); + + /* flip back to default flash page */ + + gpo0 |= 0x01; + outb(gpo0, 0x4034); + } +} + diff --git a/src/mainboard/irobot/proto1/mtrr_table.c b/src/mainboard/irobot/proto1/mtrr_table.c new file mode 100644 index 0000000000..a99b336b5b --- /dev/null +++ b/src/mainboard/irobot/proto1/mtrr_table.c @@ -0,0 +1,47 @@ +#include + +unsigned char fixed_mtrr_values[][4] = { + /* MTRRfix64K_00000_MSR, defines memory range from 0KB to 512 KB, each byte cover 64KB area */ + {MTRR_TYPE_WRBACK, MTRR_TYPE_WRBACK, MTRR_TYPE_WRBACK, MTRR_TYPE_WRBACK}, + {MTRR_TYPE_WRBACK, MTRR_TYPE_WRBACK, MTRR_TYPE_WRBACK, MTRR_TYPE_WRBACK}, + + /* MTRRfix16K_80000_MSR, defines memory range from 512KB to 640KB, each byte cover 16KB area */ + {MTRR_TYPE_WRBACK, MTRR_TYPE_WRBACK, MTRR_TYPE_WRBACK, MTRR_TYPE_WRBACK}, + {MTRR_TYPE_WRBACK, MTRR_TYPE_WRBACK, MTRR_TYPE_WRBACK, MTRR_TYPE_WRBACK}, + + /* MTRRfix16K_A0000_MSR, defines memory range from A0000 to C0000, each byte cover 16KB area */ + {MTRR_TYPE_WRCOMB, MTRR_TYPE_WRCOMB, MTRR_TYPE_WRCOMB, MTRR_TYPE_WRCOMB}, + {MTRR_TYPE_WRCOMB, MTRR_TYPE_WRCOMB, MTRR_TYPE_WRCOMB, MTRR_TYPE_WRCOMB}, + + /* MTRRfix4K_C0000_MSR, defines memory range from C0000 to C8000, each byte cover 4KB area */ + {MTRR_TYPE_WRTHROUGH, MTRR_TYPE_WRTHROUGH, MTRR_TYPE_WRTHROUGH, MTRR_TYPE_WRTHROUGH}, + {MTRR_TYPE_WRTHROUGH, MTRR_TYPE_WRTHROUGH, MTRR_TYPE_WRTHROUGH, MTRR_TYPE_WRTHROUGH}, + + /* MTRRfix4K_C8000_MSR, defines memory range from C8000 to D0000, each byte cover 4KB area */ + {MTRR_TYPE_WRTHROUGH, MTRR_TYPE_WRTHROUGH, MTRR_TYPE_WRTHROUGH, MTRR_TYPE_WRTHROUGH}, + {MTRR_TYPE_WRTHROUGH, MTRR_TYPE_WRTHROUGH, MTRR_TYPE_WRTHROUGH, MTRR_TYPE_WRTHROUGH}, + + /* MTRRfix4K_D0000_MSR, defines memory range from D0000 to D8000, each byte cover 4KB area */ + {MTRR_TYPE_UNCACHABLE, MTRR_TYPE_UNCACHABLE, MTRR_TYPE_UNCACHABLE, MTRR_TYPE_UNCACHABLE}, + {MTRR_TYPE_UNCACHABLE, MTRR_TYPE_UNCACHABLE, MTRR_TYPE_UNCACHABLE, MTRR_TYPE_UNCACHABLE}, + + /* MTRRfix4K_D8000_MSR, defines memory range from D8000 to E0000, each byte cover 4KB area */ + {MTRR_TYPE_WRTHROUGH, MTRR_TYPE_WRTHROUGH, MTRR_TYPE_WRTHROUGH, MTRR_TYPE_WRTHROUGH}, + {MTRR_TYPE_WRTHROUGH, MTRR_TYPE_WRTHROUGH, MTRR_TYPE_WRTHROUGH, MTRR_TYPE_WRTHROUGH}, + + /* MTRRfix4K_E0000_MSR, defines memory range from E0000 to E8000, each byte cover 4KB area */ + {MTRR_TYPE_WRTHROUGH, MTRR_TYPE_WRTHROUGH, MTRR_TYPE_WRTHROUGH, MTRR_TYPE_WRTHROUGH}, + {MTRR_TYPE_WRTHROUGH, MTRR_TYPE_WRTHROUGH, MTRR_TYPE_WRTHROUGH, MTRR_TYPE_WRTHROUGH}, + + /* MTRRfix4K_E8000_MSR, defines memory range from E8000 to F0000, each byte cover 4KB area */ + {MTRR_TYPE_WRTHROUGH, MTRR_TYPE_WRTHROUGH, MTRR_TYPE_WRTHROUGH, MTRR_TYPE_WRTHROUGH}, + {MTRR_TYPE_WRTHROUGH, MTRR_TYPE_WRTHROUGH, MTRR_TYPE_WRTHROUGH, MTRR_TYPE_WRTHROUGH}, + + /* MTRRfix4K_F0000_MSR, defines memory range from F0000 to F8000, each byte cover 4KB area */ + {MTRR_TYPE_WRTHROUGH, MTRR_TYPE_WRTHROUGH, MTRR_TYPE_WRTHROUGH, MTRR_TYPE_WRTHROUGH}, + {MTRR_TYPE_WRTHROUGH, MTRR_TYPE_WRTHROUGH, MTRR_TYPE_WRTHROUGH, MTRR_TYPE_WRTHROUGH}, + + /* MTRRfix4K_F8000_MSR, defines memory range from F8000 to 100000, each byte cover 4KB area */ + {MTRR_TYPE_WRTHROUGH, MTRR_TYPE_WRTHROUGH, MTRR_TYPE_WRTHROUGH, MTRR_TYPE_WRTHROUGH}, + {MTRR_TYPE_WRTHROUGH, MTRR_TYPE_WRTHROUGH, MTRR_TYPE_WRTHROUGH, MTRR_TYPE_WRTHROUGH}, +}; diff --git a/src/mainboard/irobot/proto1/proto1.config.example b/src/mainboard/irobot/proto1/proto1.config.example new file mode 100644 index 0000000000..5dd8fc63b4 --- /dev/null +++ b/src/mainboard/irobot/proto1/proto1.config.example @@ -0,0 +1,25 @@ +# Sample config file for iRobot Proto1 + +# This will make a target directory of ./proto1 +target proto1 + +# iRobot Proto1 mainboard +mainboard irobot/proto1 + +# Enable Serial Console for debugging +option SERIAL_CONSOLE +option NO_KEYBOARD + +# Enable MicroCode update for PIII +option UPDATE_MICROCODE + +#option INBUF_COPY +option DEFAULT_CONSOLE_LOGLEVEL=8 +option DEBUG +option LOADER_SETUP + +# Path to your kernel (vmlinux) +linux ~/proj/BIOS/freebios/linux + +# Kernel command line parameters +commandline root=/dev/hda1 console=ttyS0,115200 FS_MODE=ro hda=flash hdb=flash