diff --git a/src/soc/mediatek/common/include/soc/auxadc_v2.h b/src/soc/mediatek/common/include/soc/auxadc_v2.h
new file mode 100644
index 0000000000..cac784f027
--- /dev/null
+++ b/src/soc/mediatek/common/include/soc/auxadc_v2.h
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#ifndef __SOC_MEDIATEK_COMMON_INCLUDE_SOC_AUXADC_V2_H__
+#define __SOC_MEDIATEK_COMMON_INCLUDE_SOC_AUXADC_V2_H__
+
+#define ADC_GE_A_SHIFT		0
+#define ADC_GE_A_MASK		(0x3ff << ADC_GE_A_SHIFT)
+#define ADC_OE_A_SHIFT		10
+#define ADC_OE_A_MASK		(0x3ff << ADC_OE_A_SHIFT)
+
+#define AUXADC_SWCG_CLR_REG	(mtk_pericfg_ao->pericfg_ao_peri_cg_2_clr)
+#define AUXADC_SWCG_SET_REG	(mtk_pericfg_ao->pericfg_ao_peri_cg_2_set)
+#define AUXADC_SWCG_EN_BIT	27
+
+#endif
diff --git a/src/soc/mediatek/mt8189/Makefile.mk b/src/soc/mediatek/mt8189/Makefile.mk
index e00e42cd20..2051622bb5 100644
--- a/src/soc/mediatek/mt8189/Makefile.mk
+++ b/src/soc/mediatek/mt8189/Makefile.mk
@@ -32,6 +32,7 @@ romstage-y += ../common/pmif_spi.c pmif_spi.c
 romstage-y += ../common/pmif_spmi.c pmif_spmi.c
 romstage-y += ../common/rtc.c ../common/rtc_osc_init.c ../common/rtc_mt6359p.c
 
+ramstage-y += ../common/auxadc.c
 ramstage-$(CONFIG_ARM64_USE_ARM_TRUSTED_FIRMWARE) += ../common/bl31.c
 ramstage-y += ../common/dpm.c ../common/dpm_v2.c
 ramstage-y += ../common/dramc_info.c
diff --git a/src/soc/mediatek/mt8189/include/soc/addressmap.h b/src/soc/mediatek/mt8189/include/soc/addressmap.h
index 5a127f65aa..1f91d03ff9 100644
--- a/src/soc/mediatek/mt8189/include/soc/addressmap.h
+++ b/src/soc/mediatek/mt8189/include/soc/addressmap.h
@@ -54,6 +54,7 @@ enum {
 	SPI4_BASE			= IO_PHYS + 0x01014800,
 	SPI5_BASE			= IO_PHYS + 0x01015800,
 	SFLASH_REG_BASE			= IO_PHYS + 0x01018000,
+	AUXADC_BASE			= IO_PHYS + 0x01019000,
 	PERI_AO_BCRM_BASE		= IO_PHYS + 0x01035000,
 	PERICFG_AO_BASE			= IO_PHYS + 0x01036000,
 	DEVAPC_PERI_PAR_AO_BASE		= IO_PHYS + 0x0103C000,
diff --git a/src/soc/mediatek/mt8189/include/soc/auxadc.h b/src/soc/mediatek/mt8189/include/soc/auxadc.h
new file mode 100644
index 0000000000..85d29574c7
--- /dev/null
+++ b/src/soc/mediatek/mt8189/include/soc/auxadc.h
@@ -0,0 +1,16 @@
+/* SPDX-License-Identifier: GPL-2.0-only OR MIT */
+
+/*
+ * This file is created based on MT8189 Functional Specification
+ * Chapter number: 9.9
+ */
+
+#ifndef SOC_MEDIATEK_MT8189_AUXADC_H
+#define SOC_MEDIATEK_MT8189_AUXADC_H
+
+#include <soc/auxadc_common.h>
+#include <soc/auxadc_v2.h>
+#include <soc/pll.h>
+#include <stdint.h>
+
+#endif
diff --git a/src/soc/mediatek/mt8189/include/soc/efuse.h b/src/soc/mediatek/mt8189/include/soc/efuse.h
index 2d872d46b5..47cc54af4f 100644
--- a/src/soc/mediatek/mt8189/include/soc/efuse.h
+++ b/src/soc/mediatek/mt8189/include/soc/efuse.h
@@ -7,13 +7,16 @@
 #include <stdint.h>
 
 struct efuse_regs {
-	u32 reserved1[488];
+	u32 reserved1[96];
+	u32 adc_cali_reg;
+	u32 reserved2[391];
 	u32 cpu_id_reg;
-	u32 reserved2[15];
+	u32 reserved3[15];
 	u32 cpu_seg_id_reg;
-	u32 reserved3[14908];
+	u32 reserved4[14908];
 	u32 ecc_status_reg;
 };
+check_member(efuse_regs, adc_cali_reg, 0x180);
 check_member(efuse_regs, cpu_id_reg, 0x7A0);
 check_member(efuse_regs, cpu_seg_id_reg, 0x7E0);
 check_member(efuse_regs, ecc_status_reg, 0xF0D4);
diff --git a/src/soc/mediatek/mt8189/include/soc/pll.h b/src/soc/mediatek/mt8189/include/soc/pll.h
index 192bff5596..a3b474cab0 100644
--- a/src/soc/mediatek/mt8189/include/soc/pll.h
+++ b/src/soc/mediatek/mt8189/include/soc/pll.h
@@ -267,6 +267,8 @@ struct mtk_pericfg_ao_regs {
 };
 check_member(mtk_pericfg_ao_regs, pericfg_ao_peri_cg_0, 0x0010);
 check_member(mtk_pericfg_ao_regs, pericfg_ao_peri_cg_0_set, 0x0024);
+check_member(mtk_pericfg_ao_regs, pericfg_ao_peri_cg_2_set, 0x0034);
+check_member(mtk_pericfg_ao_regs, pericfg_ao_peri_cg_2_clr, 0x0038);
 
 struct mtk_afe_regs {
 	u32 audio_audio_top[5];