diff --git a/src/soc/intel/tigerlake/chip.h b/src/soc/intel/tigerlake/chip.h
index 2c0a9b4073..6f9acb9a92 100644
--- a/src/soc/intel/tigerlake/chip.h
+++ b/src/soc/intel/tigerlake/chip.h
@@ -115,6 +115,42 @@ enum ddi_port_config {
 	DDI_PORT_CFG_MIPI_DSI	= 2,
 };
 
+enum igd_dvmt50_pre_alloc {
+	IGD_SM_0MB = 0x00,
+	IGD_SM_32MB = 0x01,
+	IGD_SM_64MB = 0x02,
+	IGD_SM_96MB = 0x03,
+	IGD_SM_128MB = 0x04,
+	IGD_SM_160MB = 0x05,
+	IGD_SM_4MB = 0xF0,
+	IGD_SM_8MB = 0xF1,
+	IGD_SM_12MB = 0xF2,
+	IGD_SM_16MB = 0xF3,
+	IGD_SM_20MB = 0xF4,
+	IGD_SM_24MB = 0xF5,
+	IGD_SM_28MB = 0xF6,
+	IGD_SM_36MB = 0xF8,
+	IGD_SM_40MB = 0xF9,
+	IGD_SM_44MB = 0xFA,
+	IGD_SM_48MB = 0xFB,
+	IGD_SM_52MB = 0xFC,
+	IGD_SM_56MB = 0xFD,
+	IGD_SM_60MB = 0xFE,
+};
+
+enum igd_aperture_size {
+	IGD_AP_SZ_128MB = 0x00,
+	IGD_AP_SZ_256MB = 0x01,
+	IGD_AP_SZ_512MB = 0x02,
+	/*
+	* Values below require use of above 4G MMIO,
+	* otherwise FSP will hang
+	*/
+	IGD_AP_SZ_4G_512MB = 0x03,
+	IGD_AP_SZ_4G_1024MB = 0x07,
+	IGD_AP_SZ_4G_2048MB = 0x15,
+};
+
 struct soc_intel_tigerlake_config {
 	/* Common struct containing soc config data required by common code */
 	struct soc_intel_common_config common_soc_config;
diff --git a/src/soc/intel/tigerlake/romstage/fsp_params.c b/src/soc/intel/tigerlake/romstage/fsp_params.c
index 5ebd46dd75..4f938f16d2 100644
--- a/src/soc/intel/tigerlake/romstage/fsp_params.c
+++ b/src/soc/intel/tigerlake/romstage/fsp_params.c
@@ -29,7 +29,15 @@ static void soc_memory_init_params(FSP_M_CONFIG *m_cfg,
 
 	m_cfg->InternalGfx = !CONFIG(SOC_INTEL_DISABLE_IGD) && is_devfn_enabled(SA_DEVFN_IGD);
 
-	/* If IGD is enabled, set IGD stolen size to 60MB. Otherwise, skip IGD init in FSP */
+	if (m_cfg->InternalGfx) {
+		/* IGD is enabled, set IGD stolen size to 60MB. */
+		m_cfg->IgdDvmt50PreAlloc = get_uint_option("igd_dvmt_prealloc", IGD_SM_60MB);
+		m_cfg->ApertureSize = get_uint_option("igd_aperture_size", IGD_AP_SZ_256MB);
+	} else {
+		/* IGD is disabled, skip IGD init in FSP. */
+		m_cfg->IgdDvmt50PreAlloc = 0;
+	}
+
 	m_cfg->IgdDvmt50PreAlloc = m_cfg->InternalGfx ? 0xFE : 0;
 
 	m_cfg->TsegSize = CONFIG_SMM_TSEG_SIZE;