mb/google/bluey: Enable source mode on debug access port
The current implementation only supports sink mode on the debug access port, which is used for charging. To enhance debugging capabilities, expand the support to include source mode. Refactor the Kconfig option to HAVE_DEBUG_ACCESS_PORT_SOURCE_SINK and update the initialization logic to configure both SRC and SNK modes via the PMIC's SCHG_TYPE_C_DEBUG_ACCESS registers. This allows the debug port to serve as a power source or sink as required by the attached debug hardware. BUG=none TEST=Verify debug port modes on Google/Quartz. Change-Id: I3ec45d9cdc0ec6e723d10792f4e347462cecd2ed Signed-off-by: Kapil Porwal <kapilporwal@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/91670 Reviewed-by: Subrata Banik <subratabanik@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jayvik Desai <jayvik@google.com>
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4 changed files with 14 additions and 9 deletions
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@ -58,7 +58,7 @@ config BOARD_GOOGLE_QUENBIH
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config BOARD_GOOGLE_QUARTZ
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select BOARD_GOOGLE_MODEL_QUARTZ
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select HAVE_CHARGING_DEBUG_ACCESS_PORT
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select HAVE_DEBUG_ACCESS_PORT_SOURCE_SINK
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select SOC_QUALCOMM_HAMOA
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select MAINBOARD_HAS_PS8820_RETIMER
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select MAINBOARD_NO_USB_A_PORT
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@ -131,11 +131,11 @@ config MAINBOARD_SUPPORTS_PARALLEL_CHARGING
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help
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Enable this option if your mainboard supports parallel charging.
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config HAVE_CHARGING_DEBUG_ACCESS_PORT
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config HAVE_DEBUG_ACCESS_PORT_SOURCE_SINK
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bool
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default n
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help
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Enable this option to allow charging on the debug access port.
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Enable this option to allow source and sink modes on the debug access port.
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config MAINBOARD_HAS_GOOGLE_TPM
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bool
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@ -61,7 +61,7 @@ void setup_chromeos_gpios(void);
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bool is_off_mode(void);
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void configure_parallel_charging(void);
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void configure_parallel_charging_late(void);
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void configure_charging_debug_access(void);
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void configure_debug_access_port(void);
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void enable_slow_battery_charging(void);
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void disable_slow_battery_charging(void);
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void launch_charger_applet(void);
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@ -21,6 +21,9 @@
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#define SMB2_CHGR_CHRG_EN_CMD ((SMB2_SLAVE_ID << 16) | SCHG_CHGR_CHARGING_ENABLE_CMD)
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#define SMB1_SCHG_TYPE_C_TYPE_C_DEBUG_ACCESS_SNK_CFG \
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((SMB1_SLAVE_ID << 16) | SCHG_TYPE_C_TYPE_C_DEBUG_ACCESS_SNK_CFG)
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#define SCHG_TYPE_C_TYPE_C_DEBUG_ACCESS_SRC_CFG 0x2B4C
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#define SMB1_SCHG_TYPE_C_TYPE_C_DEBUG_ACCESS_SRC_CFG \
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((SMB1_SLAVE_ID << 16) | SCHG_TYPE_C_TYPE_C_DEBUG_ACCESS_SRC_CFG)
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#define SCHG_CHGR_CHARGING_FCC 0x260A
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#define SMB1_CHGR_CHARGING_FCC ((SMB1_SLAVE_ID << 16) | SCHG_CHGR_CHARGING_FCC)
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#define SMB2_CHGR_CHARGING_FCC ((SMB2_SLAVE_ID << 16) | SCHG_CHGR_CHARGING_FCC)
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@ -28,6 +31,7 @@
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#define FCC_1A_STEP_50MA 0x14
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#define FCC_DISABLE 0x8c
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#define EN_DEBUG_ACCESS_SNK 0x1B
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#define EN_DEBUG_ACCESS_SRC 0x01
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#define PMC8380F_SLAVE_ID 0x05
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#define GPIO07_MODE_CTL 0x8E40
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@ -205,14 +209,15 @@ void configure_parallel_charging(void)
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}
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/*
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* Enable SMB1 charging debug access port.
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* Configure debug access port to support source and sink modes.
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*/
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void configure_charging_debug_access(void)
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void configure_debug_access_port(void)
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{
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if (!CONFIG(HAVE_CHARGING_DEBUG_ACCESS_PORT))
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if (!CONFIG(HAVE_DEBUG_ACCESS_PORT_SOURCE_SINK))
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return;
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printk(BIOS_INFO, "Enable charging debug access port support\n");
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printk(BIOS_INFO, "Enable support of source and sink modes for debug access port\n");
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spmi_write8(SMB1_SCHG_TYPE_C_TYPE_C_DEBUG_ACCESS_SRC_CFG, EN_DEBUG_ACCESS_SRC);
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spmi_write8(SMB1_SCHG_TYPE_C_TYPE_C_DEBUG_ACCESS_SNK_CFG, EN_DEBUG_ACCESS_SNK);
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}
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@ -204,7 +204,7 @@ static void handle_low_power_charging_boot(void)
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static void mainboard_init(struct device *dev)
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{
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configure_parallel_charging();
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configure_charging_debug_access();
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configure_debug_access_port();
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display_startup();
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