tegra124: display clock should be initialized before any access
We initialized the dc before the plld's initialization. So some of the dc init settings did not took effect. This patch moves the clock_display() before the dc init call. BRANCH=None BUG=chrome-os-partner:28128 TEST=Display works and system boots up on Nyan and Big Change-Id: If2c40e2526fdf7a6aa33a2684ba324bd0ec40e90 Signed-off-by: Vince Hsu <vinceh@nvidia.com> Reviewed-on: https://chromium-review.googlesource.com/200413 Reviewed-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Jimmy Zhang <jimmzhang@nvidia.com> Reviewed-by: David Hendricks <dhendrix@chromium.org> Reviewed-by: Hung-Te Lin <hungte@chromium.org> Commit-Queue: David Hendricks <dhendrix@chromium.org> Tested-by: David Hendricks <dhendrix@chromium.org>
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1 changed files with 10 additions and 1 deletions
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@ -135,7 +135,7 @@ static int update_display_mode(struct display_controller *disp_ctrl,
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&disp_ctrl->disp.disp_clk_ctrl);
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printk(BIOS_DEBUG, "%s: PixelClock=%u, ShiftClockDiv=%u\n",
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__func__, config->pixel_clock, shift_clock_div);
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return clock_display(config->pixel_clock * shift_clock_div * 2);
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return 0;
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}
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static void update_window(struct display_controller *disp_ctrl,
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@ -278,6 +278,15 @@ void display_startup(device_t dev)
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* light things up here once we're sure it's all working.
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*/
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/* The plld is programmed with the assumption of the SHIFT_CLK_DIVIDER
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* and PIXEL_CLK_DIVIDER are zero (divide by 1). See the
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* update_display_mode() for detail.
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*/
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if (clock_display(config->pixel_clock * 2)) {
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printk(BIOS_ERR, "dc: clock init failed\n");
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return;
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};
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/* Init dc */
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if (tegra_dc_init(disp_ctrl)) {
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printk(BIOS_ERR, "dc: init failed\n");
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