cpu,Makefile.inc: Trivial - drop trailing blank lines at EOF

Change-Id: I7e8866d76d7f286e10160d7dc4f21f01a913bfee
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/6286
Tested-by: build bot (Jenkins)
Reviewed-by: Idwer Vollering <vidwer@gmail.com>
This commit is contained in:
Edward O'Callaghan 2014-07-16 19:03:55 +10:00
commit dc112e3515
13 changed files with 0 additions and 13 deletions

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@ -301,4 +301,3 @@ subdirs-y += ../../../x86/cache
subdirs-y += ../../../x86/mtrr
subdirs-y += ../../../x86/pae
subdirs-y += ../../../x86/smm

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@ -27,4 +27,3 @@ subdirs-y += ../../../x86/smm
ramstage-y += chip_name.c
ramstage-y += model_15_init.c

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@ -12,4 +12,3 @@ cbfs-files-$(CONFIG_GEODE_VSA_FILE) += vsa
vsa-file = $(call strip_quotes,$(CONFIG_VSA_FILENAME)):vsa
vsa-type = stage
vsa-required = VSA binary (binary and MASM source code available in coreboot/3rdparty repository)

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@ -12,4 +12,3 @@ cbfs-files-$(CONFIG_GEODE_VSA_FILE) += vsa
vsa-file = $(call strip_quotes,$(CONFIG_VSA_FILENAME)):vsa
vsa-type = stage
vsa-required = VSA binary (binary and MASM source code available in coreboot/3rdparty repository)