erebion/coreboot
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions

arm64: secmon: add entry point for turned on CPUs

Browse source 
Newly turned on CPUs need a place to go bring its EL3
state inline with expectations. Plumb this path in for
CPUs turning on as well as waking up from a power down
state. Some of the infrastructure declarations were
moved around for easier consumption in ramstage and
secmon. Lastly, a psci_soc_init() is added to
inform the SoC of the CPU's entry point as well do
any initialization.

BUG=chrome-os-partner:32112
BRANCH=None
TEST=Built and booted. On entry point not actually utilized.

Change-Id: I7b8c8c828ffb73752ca3ac1117cd895a5aa275d8
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/228296
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
This commit is contained in:
Aaron Durbin 2014-11-06 15:17:33 -06:00 • committed by chrome-internal-fetch
commit dbefec678a
8 changed files with 117 additions and 36 deletions
Download patch file Download diff file Expand all files Collapse all files

4
src/soc/nvidia/tegra132/psci.c
View file

@ -19,6 +19,10 @@
#include <arch/psci.h>
void psci_soc_init(uintptr_t cpu_on_entry)
{
}
static size_t children_at_level(int parent_level, uint64_t mpidr)
{
if (mpidr != 0)