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Broadwell FSP: Successful execution of TempRamInit

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During execution, src/soc/intel/broadwell/romstage/fsp_1_1.inc calls
src/soc/intel/fsp/fsp_util.c/find_fsp, added in change list 229573,
to locate the FSP binary in CBFS.  Determine the TempRamInit entry point
and call TempRamInit.  After returning, fsp_1_1.inc calls into
src/soc/intel/broadwell/romstage/romstage.c/romstage_main.

BRANCH=none
BUG=None
TEST=Use the following steps to reproduce:
1.  Get the private FSP parts: internal 187295
2.  Copy configs/config.samus.fsp to configs/config.samus
3.  Build and run on Samus
4.  After power on, POST code should be 0x35 if successful, hangs in
    src/soc/intel/broadwell/romstage/romstage.c/romstage_main

Change-Id: Id7d17b7b46e73a7b6b4dae6ee859016dab6e6d6f
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/234140
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
This commit is contained in:
Lee Leahy 2014-11-17 11:58:24 -08:00 • committed by chrome-internal-fetch
commit dbcbbcdff2
16 changed files with 1251 additions and 418 deletions
Download patch file Download diff file Expand all files Collapse all files

69
configs/config.samus.fsp Normal file
View file

@ -0,0 +1,69 @@
CONFIG_COLLECT_TIMESTAMPS=y
CONFIG_USE_BLOBS=y
CONFIG_VENDOR_GOOGLE=y
CONFIG_BOARD_GOOGLE_SAMUS=y
CONFIG_CBFS_SIZE=0x100000
CONFIG_CONSOLE_CBMEM=y
# Enable Serial Debugging
CONFIG_CONSOLE_SERIAL=y
CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=8
CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8
CONFIG_DEBUG_CAR=y
CONFIG_DEBUG_CBFS=y
CONFIG_DEBUG_COVERAGE=y
CONFIG_DEBUG_MALLOC=y
CONFIG_DEBUG_INTEL_ME=y
CONFIG_DEBUG_PIRQ=y
#CONFIG_DEBUG_RAM_SETUP=y
CONFIG_DEBUG_SMBUS=y
CONFIG_DEBUG_SMI=y
CONFIG_DEBUG_SMM_RELOCATION=y
#CONFIG_DEBUG_SPI=y
CONFIG_DEBUG_SPI_FLASH=y
CONFIG_DEBUG_TPM=y
# Enable FSP
CONFIG_CPU_MICROCODE_CBFS_LEN=0xd040
CONFIG_CPU_MICROCODE_CBFS_LOC=0xffe11540
CONFIG_DCACHE_RAM_BASE=0xfef00000
CONFIG_DCACHE_RAM_SIZE=0x00004000
CONFIG_FSP_FILE="3rdparty/mainboard/google/samus/fsp/FSP.fd"
CONFIG_FSP_IMAGE_ID_DWORD0=0x2d574442
CONFIG_FSP_IMAGE_ID_DWORD1=0x30505346
CONFIG_FSP_INCLUDE_PATH="3rdparty/mainboard/google/samus/fsp"
CONFIG_FSP_LOC=0xfff30000
CONFIG_HAVE_FSP_BIN=y
CONFIG_MMCONF_BASE_ADDRESS=0xe0000000
CONFIG_PLATFORM_USES_FSP=y
# CONFIG_PCI_ROM_RUN is not set
# CONFIG_ON_DEVICE_ROM_RUN is not set
# CONFIG_S3_VGA_ROM_RUN is not set
CONFIG_FRAMEBUFFER_SET_VESA_MODE=y
CONFIG_FRAMEBUFFER_VESA_MODE_USER=y
CONFIG_FRAMEBUFFER_VESA_MODE=0x161
CONFIG_FRAMEBUFFER_KEEP_VESA_MODE=y
CONFIG_VGA_BIOS_ID="8086,0406"
CONFIG_VGA_BIOS=y
CONFIG_VGA_BIOS_FILE="3rdparty/mainboard/google/samus/vgabios.bin"
CONFIG_CPU_ADDR_BITS=36
CONFIG_CACHE_ROM=y
CONFIG_MARK_GRAPHICS_MEM_WRCOMB=y
CONFIG_ELOG=y
CONFIG_ELOG_GSMI=y
CONFIG_ELOG_BOOT_COUNT=y
CONFIG_ELOG_BOOT_COUNT_CMOS_OFFSET=144
CONFIG_SPI_FLASH_SMM=y
CONFIG_CMOS_POST=y
CONFIG_CMOS_POST_OFFSET=0x70
CONFIG_CMOS_POST_EXTRA=y
CONFIG_RELOCATABLE_RAMSTAGE=y
CONFIG_CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM=y
CONFIG_RESET_ON_INVALID_RAMSTAGE_CACHE=y
CONFIG_VBOOT_VERIFY_FIRMWARE=y
CONFIG_FLASHMAP_OFFSET=0x00610000
# CONFIG_MULTIBOOT is not set
CONFIG_PAYLOAD_NONE=y
CONFIG_PRE_GRAPHICS_DELAY=200
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set