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mb/google/nissa/var/dirks: Deassert RTL8111H's ISOLATE_ODL earlier

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RTL8111 was occasionally not detected after reboot. This change
moves the configuration of the ISOLATE_ODL pin to high earlier
in the sequence to ensure the device is properly visible during
PCIe bus enumeration.

BUG=b:407469351
TEST=Verified that the Ethernet NIC is enumerated after reboot.

before:
[DEBUG]  PCI: 00:1c.0 scanning...
[SPEW ]  do_pci_scan_bridge for PCI: 00:1c.0
[DEBUG]  PCI: pci_scan_bus for bus 01
[INFO ]  PCI: Static device PCI: 01:00.0 not found, disabling it.
[DEBUG]  GENERIC: 0.0 enabled
[WARN ]  PCI: Leftover static devices:
[WARN ]  PCI: 01:00.0
[WARN ]  PCI: Check your devicetree.cb.
[DEBUG]  scan_bus: bus PCI: 00:1c.0 finished in 34 msecs

after:
[DEBUG]  PCI: 00:1c.0 scanning...
[SPEW ]  do_pci_scan_bridge for PCI: 00:1c.0
[DEBUG]  PCI: pci_scan_bus for bus 01
[SPEW ]  PCI: 01:00.0 [10ec/0000] ops
[DEBUG]  PCI: 01:00.0 [10ec/8168] enabled
[DEBUG]  GENERIC: 0.0 enabled
[INFO ]  Enabling Common Clock Configuration
[INFO ]  L1 Sub-State supported from root port 28
[INFO ]  L1 Sub-State Support = 0xf
[INFO ]  CommonModeRestoreTime = 0x96
[INFO ]  Power On Value = 0xf, Power On Scale = 0x1
[INFO ]  ASPM: Enabled L1
[INFO ]  PCIe: Max_Payload_Size adjusted to 128
[INFO ]  PCI: 01:00.0: Enabled LTR
[INFO ]  PCI: 01:00.0: Programmed LTR max latencies
[DEBUG]  scan_bus: bus PCI: 00:1c.0 finished in 68 msecs

Change-Id: Idc0eb453c342828e0e8886ca5cacea8d7efcc437
Signed-off-by: Ivy Jian <ivy.jian@quanta.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87734
Reviewed-by: Eric Lai <ericllai@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: David Wu <david_wu@quanta.corp-partner.google.com>
This commit is contained in:
Ivy Jian 2025-05-08 11:17:06 +08:00 • committed by Matt DeVillier
commit dafd7d6eb9
1 changed files with 2 additions and 0 deletions
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2
src/mainboard/google/brya/variants/dirks/gpio.c
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@ -121,6 +121,8 @@ static const struct pad_config override_gpio_table[] = {
/* Early pad configuration in bootblock */
static const struct pad_config early_gpio_table[] = {
/* H21 : IMGCLKOUT2==> LAN_PE_ISOLATE_ODL */
PAD_CFG_GPO(GPP_H21, 1, DEEP),
/* GPP_B4 : [] ==> LAN_PERST_L */
PAD_CFG_GPO(GPP_B4, 0, DEEP),
/* H20 : IMGCLKOUT1 ==> WLAN_PERST_L */