From dabc200abb8293a3301603ce88e8e35b33f45685 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Micha=C5=82=20Kope=C4=87?= <michal.kopec@3mdeb.com>
Date: Thu, 24 Oct 2024 19:42:45 +0200
Subject: [PATCH] mb/lenovo/m900_tiny: enable power LED blink in S3 and S4
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The power LED may be disabled by GPP_D1. The pin is PWM capable, so
configure it in PWM mode with a frequency of 0.5Hz, duty cycle of 50%
when entering sleep.

The result is that the power LED toggles on/off every second.

TEST=Boot to Windows 10, enter S3, and wake. The power LED will blink
when system is asleep and glow continuously when awake.

Change-Id: I121e0ef3e47aec1cacdace3f2af47a3fdacf69cf
Signed-off-by: Michał Kopeć <michal.kopec@3mdeb.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84860
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
---
 src/mainboard/lenovo/m900_tiny/Makefile.mk  |  2 ++
 src/mainboard/lenovo/m900_tiny/gpio.c       |  2 +-
 src/mainboard/lenovo/m900_tiny/ramstage.c   |  8 ++++++++
 src/mainboard/lenovo/m900_tiny/smihandler.c | 22 +++++++++++++++++++++
 4 files changed, 33 insertions(+), 1 deletion(-)
 create mode 100644 src/mainboard/lenovo/m900_tiny/smihandler.c

diff --git a/src/mainboard/lenovo/m900_tiny/Makefile.mk b/src/mainboard/lenovo/m900_tiny/Makefile.mk
index 3b5a2a27a5..d016e93f49 100644
--- a/src/mainboard/lenovo/m900_tiny/Makefile.mk
+++ b/src/mainboard/lenovo/m900_tiny/Makefile.mk
@@ -12,3 +12,5 @@ ramstage-y += gpio.c
 ramstage-y += hda_verb.c
 ramstage-y += ramstage.c
 ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads
+
+smm-y += smihandler.c
diff --git a/src/mainboard/lenovo/m900_tiny/gpio.c b/src/mainboard/lenovo/m900_tiny/gpio.c
index 4c4bac4b8e..101f47b673 100644
--- a/src/mainboard/lenovo/m900_tiny/gpio.c
+++ b/src/mainboard/lenovo/m900_tiny/gpio.c
@@ -91,7 +91,7 @@ static const struct pad_config gpio_table[] = {
 	/* ------- GPIO Group GPP_D ------- */
 
 	PAD_NC(GPP_D0, NONE),
-	PAD_NC(GPP_D1, NONE),
+	PAD_CFG_NF(GPP_D1, NONE, DEEP, NF4), /* PW_LED# (blink mode)*/
 	PAD_NC(GPP_D2, NONE),
 	PAD_NC(GPP_D3, NONE),
 	PAD_NC(GPP_D4, NONE),
diff --git a/src/mainboard/lenovo/m900_tiny/ramstage.c b/src/mainboard/lenovo/m900_tiny/ramstage.c
index 7eadabe2a2..92ef6b8e67 100644
--- a/src/mainboard/lenovo/m900_tiny/ramstage.c
+++ b/src/mainboard/lenovo/m900_tiny/ramstage.c
@@ -5,8 +5,10 @@
 #include <device/pci_def.h>
 #include <drivers/intel/gma/int15.h>
 #include <gpio.h>
+#include <intelblocks/pcr.h>
 #include <mainboard/gpio.h>
 #include <option.h>
+#include <soc/pcr_ids.h>
 #include <soc/ramstage.h>
 #include <static.h>
 #include <superio/nuvoton/nct6687d/nct6687d.h>
@@ -73,6 +75,12 @@ static void mainboard_enable(struct device *dev)
 	mainboard_configure_gpios();
 	devtree_update();
 	print_board_id();
+	/* Configure GPIO community 1 PWM frequency to 0.5Hz, 0% duty cycle */
+	pcr_write32(PID_GPIOCOM1, 0x204, (1 << 14));
+	/* Set the software update flag */
+	pcr_or32(PID_GPIOCOM1, 0x204, (1 << 30));
+	/* Enable PWM */
+	pcr_or32(PID_GPIOCOM1, 0x204, (1 << 31));
 }
 
 struct chip_operations mainboard_ops = {
diff --git a/src/mainboard/lenovo/m900_tiny/smihandler.c b/src/mainboard/lenovo/m900_tiny/smihandler.c
new file mode 100644
index 0000000000..6ae0b36a25
--- /dev/null
+++ b/src/mainboard/lenovo/m900_tiny/smihandler.c
@@ -0,0 +1,22 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <acpi/acpi.h>
+#include <cpu/x86/smm.h>
+#include <intelblocks/pcr.h>
+#include <soc/pcr_ids.h>
+
+void mainboard_smi_sleep(u8 slp_typ)
+{
+	/* Enable blinking power LED when entering S3 or S4 */
+	switch (slp_typ) {
+	case ACPI_S3:
+	case ACPI_S4:
+		/* Configure GPIO community 1 PWM duty cycle to 50% */
+		pcr_rmw32(PID_GPIOCOM1, 0x204, 0xffffff00, 0x7f);
+		/* Set the software update flag */
+		pcr_or32(PID_GPIOCOM1, 0x204, (1 << 30));
+		break;
+	default:
+		break;
+	}
+}