smbios: Add smbios_cache_speed() implementation

Allow the SoC the specify the cache speed. Currently it's
always set to 0, which is unknown.

Change-Id: I317e248104c0026b7cca10b949fd47fba35b7338
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/91387
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Patrick Rudolph 2026-02-23 12:10:17 +01:00 committed by Matt DeVillier
commit da36276955
2 changed files with 7 additions and 1 deletions

View file

@ -104,6 +104,7 @@ unsigned int smbios_processor_family(struct cpuid_result res);
unsigned int smbios_cache_error_correction_type(u8 level);
unsigned int smbios_cache_sram_type(void);
unsigned int smbios_cache_conf_operation_mode(u8 level);
u8 smbios_cache_speed(u8 level);
/* Used by mainboard to add port information of type 8 */
struct port_information;

View file

@ -445,6 +445,11 @@ unsigned int __weak smbios_cache_conf_operation_mode(u8 level)
return SMBIOS_CACHE_OP_MODE_UNKNOWN; /* Unknown */
}
u8 __weak smbios_cache_speed(u8 level)
{
return 0; /* Unknown */
}
/* Returns the processor voltage in 100mV units */
unsigned int __weak smbios_cpu_get_voltage(void)
{
@ -583,7 +588,7 @@ int smbios_write_type7(unsigned long *current,
t->associativity = associativity;
t->supported_sram_type = sram_type;
t->current_sram_type = sram_type;
t->cache_speed = 0; /* Unknown */
t->cache_speed = smbios_cache_speed(level);
t->error_correction_type = smbios_cache_error_correction_type(level);
t->system_cache_type = type;