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soc/mediatek/mt8189: Correct thermal SRAM base address and length

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A recent code review reveals incorrect SRAM base address and length
settings from the thermal driver refactor. This causes incorrect initial
values in SRAM and leads to CPU DVFS not working properly. After
correction, the CPU DVFS voltage and clock operate normally.

BUG=b:428613901
BRANCH=none
TEST=Clocks fm_armpll_ll_ck (LITTLE) and fm_armpll_bl_ck (big) are
correct. Voltages: vbuck1 (big) <1100mV, vmodem (LITTLE) <1050mV.
echo 2000000 > /sys/devices/system/cpu/cpufreq/policy0/scaling_max_freq
echo 2000000 > /sys/devices/system/cpu/cpufreq/policy0/scaling_min_freq
echo 2600000 > /sys/devices/system/cpu/cpufreq/policy6/scaling_min_freq
echo 2600000 > /sys/devices/system/cpu/cpufreq/policy6/scaling_max_freq
clkdbg() { echo $@ > /proc/clkdbg ; cat /proc/clkdbg ; }
clkdbg fmeter | grep armpll
cat /sys/kernel/debug/regulator/regulator_summary | grep buck1
cat /sys/kernel/debug/regulator/regulator_summary | grep modem
 6: fm_armpll_bl_ck              : 2600000
 8: fm_armpll_ll_ck              : 1999968
 vbuck1                           1    0      0  normal  1037mV     0mA     0mV     0mV
 vmodem                           1    0      0  normal  1043mV     0mA   400mV  1100mV

Signed-off-by: Raymond Sun <raymond.sun@mediatek.corp-partner.google.com>
Change-Id: I5caebb27a47d7b19330ec8ac23e20a6efe23e940
Reviewed-on: https://review.coreboot.org/c/coreboot/+/88530
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Reviewed-by: Yidi Lin <yidilin@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
This commit is contained in:
Raymond Sun 2025-07-22 14:38:05 +08:00 • committed by Yu-Ping Wu
commit da33feeb51
1 changed files with 2 additions and 3 deletions
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5
src/soc/mediatek/mt8189/include/soc/thermal_internal.h
View file

@ -34,9 +34,8 @@
#define STAGE3_INT_EN BIT(31)
/* SRAM for Thermal */
#define THERMAL_ATC_SRAM_OFFSET 0x280
#define THERMAL_SRAM_BASE (_thermal_reserved + THERMAL_ATC_SRAM_OFFSET)
#define THERMAL_SRAM_LEN (24 * 4)
#define THERMAL_SRAM_BASE _thermal_reserved
#define THERMAL_SRAM_LEN REGION_SIZE(thermal_reserved)
#define THERMAL_STAT_SRAM_BASE _cpucooler_reserved
#define THERMAL_STAT_SRAM_LEN REGION_SIZE(cpucooler_reserved)