diff --git a/src/soc/intel/common/block/include/intelblocks/power_limit.h b/src/soc/intel/common/block/include/intelblocks/power_limit.h
index d02eaa1352..8e517caed0 100644
--- a/src/soc/intel/common/block/include/intelblocks/power_limit.h
+++ b/src/soc/intel/common/block/include/intelblocks/power_limit.h
@@ -32,6 +32,8 @@ struct soc_power_limits_config {
 	uint32_t tdp_psyspl3_dutycycle;
 	/* PL4 Value in Watts */
 	uint16_t tdp_pl4;
+	/* PL4 Value in Watts when Fast VMode is enabled */
+	uint16_t tdp_pl4_fastvmode;
 	/* Estimated maximum platform power in Watts */
 	uint16_t psys_pmax;
 };
diff --git a/src/soc/intel/pantherlake/chipset_ptl.cb b/src/soc/intel/pantherlake/chipset_ptl.cb
index 79666cbb3b..838fdfa30a 100644
--- a/src/soc/intel/pantherlake/chipset_ptl.cb
+++ b/src/soc/intel/pantherlake/chipset_ptl.cb
@@ -2,24 +2,31 @@ chip soc/intel/pantherlake
 
 	device cpu_cluster 0 on end
 
+	# H404
 	register "power_limits_config[PTL_U_1_CORE]" = "{
 		.tdp_pl1_override = 15,
 		.tdp_pl2_override = 55,
-		.tdp_pl4 = 152,
+		.tdp_pl4 = 163,
+		.tdp_pl4_fastvmode = 150,
 	}"
 
+	# H204
 	register "power_limits_config[PTL_U_2_CORE]" = "{
 		.tdp_pl1_override = 15,
 		.tdp_pl2_override = 45,
 		.tdp_pl4 = 105,
+		.tdp_pl4_fastvmode = 95,
 	}"
 
+	# H12Xe and H484
 	register "power_limits_config[PTL_H_1_CORE]" = "{
 		.tdp_pl1_override = 25,
-		.tdp_pl2_override = 95,
-		.tdp_pl4 = 239,
+		.tdp_pl2_override = 64,
+		.tdp_pl4 = 175,
+		.tdp_pl4_fastvmode = 160,
 	}"
 
+	# H444
 	register "power_limits_config[PTL_H_2_CORE]" = "{
 		.tdp_pl1_override = 25,
 		.tdp_pl2_override = 64,
diff --git a/src/soc/intel/pantherlake/systemagent.c b/src/soc/intel/pantherlake/systemagent.c
index a5a734f02d..82e5d244c7 100644
--- a/src/soc/intel/pantherlake/systemagent.c
+++ b/src/soc/intel/pantherlake/systemagent.c
@@ -171,6 +171,9 @@ static void configure_tdp(struct device *dev)
 		if (sa_pci_id == cpuid_to_ptl[i].cpu_id &&
 				tdp == cpuid_to_ptl[i].cpu_tdp) {
 			soc_config = &config->power_limits_config[cpuid_to_ptl[i].limits];
+			if (config->enable_fast_vmode[VR_DOMAIN_IA] &&
+			    soc_config->tdp_pl4_fastvmode)
+				soc_config->tdp_pl4 = soc_config->tdp_pl4_fastvmode;
 			set_power_limits(MOBILE_SKU_PL1_TIME_SEC, soc_config);
 			config_tdp = true;
 			printk(BIOS_DEBUG, "Configured power limits for SA PCI ID: 0x%4x\n",